[X86] 8-bit vector multiplication should use shift and add method for more constants

[WalterKruger]

Vector multiplication by most 8-bit constants is currently implemented by a width extension to 16-bits:

multiplyBy10_clang:
        movdqa  xmm1, xmm0
        punpckhbw       xmm1, xmm1
        movdqa  xmm2, xmmword ptr [rip + .LCPI0_0]
        pmullw  xmm1, xmm2
        movdqa  xmm3, xmmword ptr [rip + .LCPI0_1]
        pand    xmm1, xmm3
        punpcklbw       xmm0, xmm0
        pmullw  xmm0, xmm2
        pand    xmm0, xmm3
        packuswb        xmm0, xmm1
        ret

However, it is often more efficient to instead perform a short sequence of shift-and-adds both in terms of size and dependency length. For example, x * 10 = (x << 3) + (x << 1):

multiplyBy10_shiftAndAdd:
        movdqa  xmm1, xmm0
        paddb   xmm0, xmm0
        psllw   xmm1, 3
        pand    xmm1, xmmword ptr [rip + .LCPI0_0]
        paddb   xmm0, xmm1
        ret

This method is currently implemented, but only for constants that are almost powers of two. Notably, gcc always use this method (although its sequences are often non-optimal).

https://godbolt.org/z/naKxr6z6a

[llvmbot]

@llvm/issue-subscribers-backend-x86

Author: Walter (WalterKruger)

Vector multiplication by most 8-bit constants is currently implemented by a width extension to 16-bits: ```asm multiplyBy10_clang: movdqa xmm1, xmm0 punpckhbw xmm1, xmm1 movdqa xmm2, xmmword ptr [rip + .LCPI0_0] pmullw xmm1, xmm2 movdqa xmm3, xmmword ptr [rip + .LCPI0_1] pand xmm1, xmm3 punpcklbw xmm0, xmm0 pmullw xmm0, xmm2 pand xmm0, xmm3 packuswb xmm0, xmm1 ret ```

However, it is often more efficient to instead perform a short sequence of shift-and-adds both in terms of size and dependency length. For example, x * 10 = (x << 3) + (x << 1):

multiplyBy10_shiftAndAdd:
        movdqa  xmm1, xmm0
        paddb   xmm0, xmm0
        psllw   xmm1, 3
        pand    xmm1, xmmword ptr [rip + .LCPI0_0]
        paddb   xmm0, xmm1
        ret

This method is currently implemented, but only for constants that are almost powers of two. Notably, gcc always use this method (although its sequences are often non-optimal).

https://godbolt.org/z/naKxr6z6a

[llvmbot]

Hi!

This issue may be a good introductory issue for people new to working on LLVM. If you would like to work on this issue, your first steps are:

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[llvmbot]

@llvm/issue-subscribers-good-first-issue

Author: Walter (WalterKruger)

Vector multiplication by most 8-bit constants is currently implemented by a width extension to 16-bits: ```asm multiplyBy10_clang: movdqa xmm1, xmm0 punpckhbw xmm1, xmm1 movdqa xmm2, xmmword ptr [rip + .LCPI0_0] pmullw xmm1, xmm2 movdqa xmm3, xmmword ptr [rip + .LCPI0_1] pand xmm1, xmm3 punpcklbw xmm0, xmm0 pmullw xmm0, xmm2 pand xmm0, xmm3 packuswb xmm0, xmm1 ret ```

However, it is often more efficient to instead perform a short sequence of shift-and-adds both in terms of size and dependency length. For example, x * 10 = (x << 3) + (x << 1):

multiplyBy10_shiftAndAdd:
        movdqa  xmm1, xmm0
        paddb   xmm0, xmm0
        psllw   xmm1, 3
        pand    xmm1, xmmword ptr [rip + .LCPI0_0]
        paddb   xmm0, xmm1
        ret

This method is currently implemented, but only for constants that are almost powers of two. Notably, gcc always use this method (although its sequences are often non-optimal).

https://godbolt.org/z/naKxr6z6a

[RKSimon]

We can probably profitably relax this to include splat multiplies of vXi8 types by any splat constant decomposable into a max of TWO pow2 constants.

This involves minor adjustments to X86TargetLowering::decomposeMulByConstant to special case vXi8 vector types along with any additional test cases we need.

[zheguang]

Hi! I'd like to work on this issue.