[RISCV] Simple __bf16 vectorization fails isel with Zvbfa without Zvfbfmin

[topperc]

fatal error: error in backend: Cannot select: 0x3ee16420: nxv8bf16 = fp_round 0x3ee16340, TargetConstant:i64<0>, example.cpp:3:10
  0x3ee16340: nxv8f32 = fadd 0x3ee167a0, 0x3ee167a0, example.cpp:3:10
    0x3ee167a0: nxv8f32 = RISCVISD::FP_EXTEND_VL 0x3ee1b2c0, 0x3ee1b250, Register:i64 $x0, example.cpp:3:10
      0x3ee1b2c0: nxv8bf16,ch = llvm.riscv.vle<(load unknown-size from %ir.10, align 2, !tbaa !34)> 0x3ec9a8a0, TargetConstant:i64<11873>, undef:nxv8bf16, 0x3ee16730, 0x3ee16ff0, example.cpp:3:13
        0x3ee16730: i64 = add nuw 0x3ee163b0, 0x3ee168f0, example.cpp:3:13
          0x3ee163b0: i64,ch = CopyFromReg 0x3ec9a8a0, Register:i64 %5, example.cpp:3:13
          0x3ee168f0: i64 = shl nuw nsw 0x3ee16880, Constant:i64<1>, example.cpp:3:13
            0x3ee16880: i64,ch = CopyFromReg 0x3ec9a8a0, Register:i64 %1, example.cpp:3:13
        0x3ee16ff0: i64 = llvm.riscv.vsetvli TargetConstant:i64<12094>, 0x3ee169d0, TargetConstant:i64<0>, TargetConstant:i64<0>
          0x3ee169d0: i64,ch = CopyFromReg 0x3ec9a8a0, Register:i64 %2
      0x3ee1b250: nxv8i1 = RISCVISD::VMSET_VL Register:i64 $x0, example.cpp:3:10
    0x3ee167a0: nxv8f32 = RISCVISD::FP_EXTEND_VL 0x3ee1b2c0, 0x3ee1b250, Register:i64 $x0, example.cpp:3:10
      0x3ee1b2c0: nxv8bf16,ch = llvm.riscv.vle<(load unknown-size from %ir.10, align 2, !tbaa !34)> 0x3ec9a8a0, TargetConstant:i64<11873>, undef:nxv8bf16, 0x3ee16730, 0x3ee16ff0, example.cpp:3:13
        0x3ee16730: i64 = add nuw 0x3ee163b0, 0x3ee168f0, example.cpp:3:13
          0x3ee163b0: i64,ch = CopyFromReg 0x3ec9a8a0, Register:i64 %5, example.cpp:3:13
          0x3ee168f0: i64 = shl nuw nsw 0x3ee16880, Constant:i64<1>, example.cpp:3:13
            0x3ee16880: i64,ch = CopyFromReg 0x3ec9a8a0, Register:i64 %1, example.cpp:3:13
        0x3ee16ff0: i64 = llvm.riscv.vsetvli TargetConstant:i64<12094>, 0x3ee169d0, TargetConstant:i64<0>, TargetConstant:i64<0>
          0x3ee169d0: i64,ch = CopyFromReg 0x3ec9a8a0, Register:i64 %2
      0x3ee1b250: nxv8i1 = RISCVISD::VMSET_VL Register:i64 $x0, example.cpp:3:10

https://godbolt.org/z/YW9c83b1Y

[llvmbot]

@llvm/issue-subscribers-backend-risc-v

Author: Craig Topper (topperc)

``` fatal error: error in backend: Cannot select: 0x3ee16420: nxv8bf16 = fp_round 0x3ee16340, TargetConstant:i64<0>, example.cpp:3:10 0x3ee16340: nxv8f32 = fadd 0x3ee167a0, 0x3ee167a0, example.cpp:3:10 0x3ee167a0: nxv8f32 = RISCVISD::FP_EXTEND_VL 0x3ee1b2c0, 0x3ee1b250, Register:i64 $x0, example.cpp:3:10 0x3ee1b2c0: nxv8bf16,ch = llvm.riscv.vle<(load unknown-size from %ir.10, align 2, !tbaa !34)> 0x3ec9a8a0, TargetConstant:i64<11873>, undef:nxv8bf16, 0x3ee16730, 0x3ee16ff0, example.cpp:3:13 0x3ee16730: i64 = add nuw 0x3ee163b0, 0x3ee168f0, example.cpp:3:13 0x3ee163b0: i64,ch = CopyFromReg 0x3ec9a8a0, Register:i64 %5, example.cpp:3:13 0x3ee168f0: i64 = shl nuw nsw 0x3ee16880, Constant:i64<1>, example.cpp:3:13 0x3ee16880: i64,ch = CopyFromReg 0x3ec9a8a0, Register:i64 %1, example.cpp:3:13 0x3ee16ff0: i64 = llvm.riscv.vsetvli TargetConstant:i64<12094>, 0x3ee169d0, TargetConstant:i64<0>, TargetConstant:i64<0> 0x3ee169d0: i64,ch = CopyFromReg 0x3ec9a8a0, Register:i64 %2 0x3ee1b250: nxv8i1 = RISCVISD::VMSET_VL Register:i64 $x0, example.cpp:3:10 0x3ee167a0: nxv8f32 = RISCVISD::FP_EXTEND_VL 0x3ee1b2c0, 0x3ee1b250, Register:i64 $x0, example.cpp:3:10 0x3ee1b2c0: nxv8bf16,ch = llvm.riscv.vle<(load unknown-size from %ir.10, align 2, !tbaa !34)> 0x3ec9a8a0, TargetConstant:i64<11873>, undef:nxv8bf16, 0x3ee16730, 0x3ee16ff0, example.cpp:3:13 0x3ee16730: i64 = add nuw 0x3ee163b0, 0x3ee168f0, example.cpp:3:13 0x3ee163b0: i64,ch = CopyFromReg 0x3ec9a8a0, Register:i64 %5, example.cpp:3:13 0x3ee168f0: i64 = shl nuw nsw 0x3ee16880, Constant:i64<1>, example.cpp:3:13 0x3ee16880: i64,ch = CopyFromReg 0x3ec9a8a0, Register:i64 %1, example.cpp:3:13 0x3ee16ff0: i64 = llvm.riscv.vsetvli TargetConstant:i64<12094>, 0x3ee169d0, TargetConstant:i64<0>, TargetConstant:i64<0> 0x3ee169d0: i64,ch = CopyFromReg 0x3ec9a8a0, Register:i64 %2 0x3ee1b250: nxv8i1 = RISCVISD::VMSET_VL Register:i64 $x0, example.cpp:3:10 ```

https://godbolt.org/z/YW9c83b1Y