[X86] Make VBMI2 supported ISD::FSHL/FSHR instructions legal instead of custom

[RKSimon]

FSHL/FSHR instructions are legal on VBMI2 targets for v32i16 / v16i32 / v8i64 types

FSHL/FSHR instructions are legal on VBMI2 + VLX targets for v8i16 / v16i16 / v4i32 / v8i32 / v2i64 / v4i64 types

There's no need to go through LowerFunnelShift for these cases, instead we should make them legal and add a combineFunnelShift to convert instructions with uniform constant shift amounts to use X86ISD::VSHLD/X86ISD::VSHRD.

We'll still need LowerFunnelShift to handle widening to 512-bits for VBMI2 only (no VLX) - but the constant handling can be moved entirely to the combine.

[llvmbot]

Hi!

This issue may be a good introductory issue for people new to working on LLVM. If you would like to work on this issue, your first steps are:

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2. Leave a comment indicating that you are working on the issue, or just create a pull request after following the steps below. Mention this issue in the description of the pull request.
3. Fix the issue locally.
4. Run the test suite locally. Remember that the subdirectories under test/ create fine-grained testing targets, so you can e.g. use make check-clang-ast to only run Clang's AST tests.
5. Create a Git commit.
6. Run git clang-format HEAD~1 to format your changes.
7. Open a pull request to the upstream repository on GitHub. Detailed instructions can be found in GitHub's documentation. Mention this issue in the description of the pull request.

If you have any further questions about this issue, don't hesitate to ask via a comment in the thread below.

[llvmbot]

@llvm/issue-subscribers-good-first-issue

Author: Simon Pilgrim (RKSimon)

FSHL/FSHR instructions are legal on VBMI2 targets for v32i16 / v16i32 / v8i64 types

FSHL/FSHR instructions are legal on VBMI2 + VLX targets for v8i16 / v16i16 / v4i32 / v8i32 / v2i64 / v4i64 types

There's no need to go through LowerFunnelShift for these cases, instead we should make them legal and add a combineFunnelShift to convert instructions with uniform constant shift amounts to use X86ISD::VSHLD/X86ISD::VSHRD.

We'll still need LowerFunnelShift to handle widening to 512-bits for VBMI2 only (no VLX) - but the constant handling can be moved entirely to the combine.

[llvmbot]

@llvm/issue-subscribers-backend-x86

Author: Simon Pilgrim (RKSimon)

FSHL/FSHR instructions are legal on VBMI2 targets for v32i16 / v16i32 / v8i64 types

FSHL/FSHR instructions are legal on VBMI2 + VLX targets for v8i16 / v16i16 / v4i32 / v8i32 / v2i64 / v4i64 types

There's no need to go through LowerFunnelShift for these cases, instead we should make them legal and add a combineFunnelShift to convert instructions with uniform constant shift amounts to use X86ISD::VSHLD/X86ISD::VSHRD.

We'll still need LowerFunnelShift to handle widening to 512-bits for VBMI2 only (no VLX) - but the constant handling can be moved entirely to the combine.

[yichi170]

Can I give it a try?

[ArnavM3434]

Can I attempt this issue if nobody is working on it right now?

[RKSimon]

@yichi170 ping?

[yichi170]

Hi @ArnavM3434, I've been working on this issue, but I've been quite busy recently. Feel free to try it. If you want to discuss, just let me know!

[ArnavM3434]

Ok @yichi170 sure I'll give it a try and we can discuss!