[mlir][ROCDL] refactor wmma intrinsic ops

[Muzammiluddin-Syed-ECE]

Currently, within wmma intrinsic ops in the ROCDL dialect, things that should be attributes such as clamp, signA, subwordOffset, etc. are represented with operands. This is incorrect and should be rectified.

Example:

class ROCDL_Wmma_IntrOp<string mnemonic, list<int> overloadedOperands,
                        list<Trait> traits = []> :
  ROCDL_IntrOp<mnemonic, [0], overloadedOperands, traits, 1>,
  Arguments<(ins Variadic<LLVM_Type>:$args)> {
  let assemblyFormat =
    "$args attr-dict `:` functional-type($args, $res)";
}
...
def ROCDL_wmma_f32_16x16x4_f32 : ROCDL_Wmma_IntrOp<"wmma.f32.16x16x4.f32", [1]>;

 rocdl.wmma.f32.16x16x4.f32 %zero, %arg10, %zero, %arg10, %zero_i16, %arg11, %zero, %zero : (i1, vector<16xf32>, i1, vector<16xf32>, i16, vector<4xf32>, i1, i1) -> vector<4xf32>

instead we would like something like this:

rocdl.wmma.f32.16x16x4.f32 %arg10, %arg10, %arg11 {signA = false, signB = false, modC = 0 : i16} : (vector<16xf32>, vector<16xf32>, vector<4xf32>) -> vector<4xf32>

[llvmbot]

@llvm/issue-subscribers-mlir

Author: Muzammiluddin Syed (Muzammiluddin-Syed-ECE)

Currently, within wmma intrinsic ops in the `ROCDL` dialect, things that should be attributes such as `clamp`, `signA`, `subwordOffset`, etc. are represented with operands. This is incorrect and should be rectified.

Example:

class ROCDL_Wmma_IntrOp<string mnemonic, list<int> overloadedOperands,
                        list<Trait> traits = []> :
  ROCDL_IntrOp<mnemonic, [0], overloadedOperands, traits, 1>,
  Arguments<(ins Variadic<LLVM_Type>:$args)> {
  let assemblyFormat =
    "$args attr-dict `:` functional-type($args, $res)";
}
...
def ROCDL_wmma_f32_16x16x4_f32 : ROCDL_Wmma_IntrOp<"wmma.f32.16x16x4.f32", [1]>;

 rocdl.wmma.f32.16x16x4.f32 %zero, %arg10, %zero, %arg10, %zero_i16, %arg11, %zero, %zero : (i1, vector<16xf32>, i1, vector<16xf32>, i16, vector<4xf32>, i1, i1) -> vector<4xf32>

instead we would like something like this:

rocdl.wmma.f32.16x16x4.f32 %arg10, %arg10, %arg11 {signA = false, signB = false, modC = 0 : i16} : (vector<16xf32>, vector<16xf32>, vector<4xf32>) -> vector<4xf32>

[Muzammiluddin-Syed-ECE]

PR: #167041