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4 changes: 4 additions & 0 deletions llvm/lib/Target/NVPTX/NVVMIntrRange.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -130,6 +130,10 @@ static bool runNVVMIntrRange(Function &F) {
if (OverallClusterRank)
return addRangeAttr(1, FunctionClusterRank + 1, II);
break;

// Lane ID
case Intrinsic::nvvm_read_ptx_sreg_laneid:
return addRangeAttr(0, 32, II);
Comment on lines +134 to +136
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Looks like we already attach this range info to the declaration of the intrinsic via TableGen attrs. Is there any reason we need to attach it to each call as well?

def int_nvvm_read_ptx_sreg_laneid
: PTXReadSRegIntrinsic_r32<[Range<RetIndex, 0, WARP_SIZE>]>;

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I added this for completeness of the pass. Won't the range info through TableGen attrs be available only while InstructionSelection? and not before.

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As far as I know these attributes will be part of the IR and basically indistinguishable from if they were added to the call itself. Here is a quick demo:

https://cuda.godbolt.org/z/b6fEsKddc

Unless we find a use-case for adding to the call as well, I don't think it makes sense to include it here for completeness.

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that makes sense!

default:
return false;
}
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10 changes: 10 additions & 0 deletions llvm/test/CodeGen/NVPTX/intr-range.ll
Original file line number Diff line number Diff line change
Expand Up @@ -135,6 +135,16 @@ define ptx_kernel i32 @test_cluster_dim() "nvvm.cluster_dim"="4,4,1" {
ret i32 %11
}

define ptx_kernel i32 @test_laneid() "nvvm.cluster_dim"="4,4,1" {
; CHECK-LABEL: define ptx_kernel i32 @test_laneid(
; CHECK-SAME: ) #[[ATTR4]] {
; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 32) i32 @llvm.nvvm.read.ptx.sreg.laneid()
; CHECK-NEXT: ret i32 [[TMP1]]
;
%1 = call i32 @llvm.nvvm.read.ptx.sreg.laneid()
ret i32 %1
}


; DEFAULT-DAG: declare noundef range(i32 0, 1024) i32 @llvm.nvvm.read.ptx.sreg.tid.x()
; DEFAULT-DAG: declare noundef range(i32 0, 1024) i32 @llvm.nvvm.read.ptx.sreg.tid.y()
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