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[RegAlloc] Remove default restriction on non-trivial rematerialization #159211

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Merged
merged 4 commits into from
Oct 4, 2025
+1,442 −1,469
Merged

[RegAlloc] Remove default restriction on non-trivial rematerialization #159211

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6c47182
[RegAlloc] Allow rematerialization with virtual reg uses
lukel97 Sep 16, 2025
19afda0
Fix SystemZ test
lukel97 Oct 1, 2025
0f685ca
Merge branch 'main' into regalloc/allow-virtreg-remat
lukel97 Oct 4, 2025
b58e22f
Update ARM tests after merge
lukel97 Oct 4, 2025
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6 changes: 0 additions & 6 deletions llvm/lib/CodeGen/TargetInstrInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1657,12 +1657,6 @@ bool TargetInstrInfo::isReMaterializableImpl(
// same virtual register, though.
if (MO.isDef() && Reg != DefReg)
return false;

// Don't allow any virtual-register uses. Rematting an instruction with
// virtual register uses would length the live ranges of the uses, which
// is not necessarily a good idea, certainly not "trivial".
if (MO.isUse())
return false;
}

// Everything checked out.
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