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[SPIRV] Added Support for the SPV_INTEL_arbitrary_precesion_floating_point Extension #160054

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[SPIRV] Added Support for the SPV_INTEL_arbitrary_precesion_floating_point Extension #160054

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d109c0a
[SPIRV] Added Support for the SPV_INTEL_arbitrary_precesion_floating_…
SubashBoopathi Aug 20, 2025
a6f1051
Resolved the conflicts in the llvm project
SubashBoopathi Sep 22, 2025
3c89add
Merge branch 'main' into spv_intel_arbitrary_floating_points
SubashBoopathi Oct 6, 2025
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45 changes: 45 additions & 0 deletions llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2815,6 +2815,49 @@ static bool generateVectorLoadStoreInst(const SPIRV::IncomingCall *Call,
return true;
}

static bool generateAFPInst(const SPIRV::IncomingCall *Call,
MachineIRBuilder &MIRBuilder,
SPIRVGlobalRegistry *GR) {
const auto *Builtin = Call->Builtin;
auto *MRI = MIRBuilder.getMRI();
unsigned Opcode =
SPIRV::lookupNativeBuiltin(Builtin->Name, Builtin->Set)->Opcode;
const Type *RetTy = GR->getTypeForSPIRVType(Call->ReturnType);
bool IsVoid = RetTy->isVoidTy();
auto MIB = MIRBuilder.buildInstr(Opcode);
Register DestReg;
if (IsVoid) {
LLT PtrTy = MRI->getType(Call->Arguments[0]);
DestReg = MRI->createGenericVirtualRegister(PtrTy);
MRI->setRegClass(DestReg, &SPIRV::pIDRegClass);
SPIRVType *PointeeTy =
GR->getPointeeType(GR->getSPIRVTypeForVReg(Call->Arguments[0]));
MIB.addDef(DestReg);
MIB.addUse(GR->getSPIRVTypeID(PointeeTy));
} else {
MIB.addDef(Call->ReturnRegister);
MIB.addUse(GR->getSPIRVTypeID(Call->ReturnType));
}
for (unsigned i = IsVoid ? 1 : 0; i < Call->Arguments.size(); ++i) {
Register Arg = Call->Arguments[i];
MachineInstr *DefMI = MRI->getUniqueVRegDef(Arg);
if (DefMI->getOpcode() == TargetOpcode::G_CONSTANT &&
DefMI->getOperand(1).isCImm()) {
MIB.addImm(getConstFromIntrinsic(Arg, MRI));
} else {
MIB.addUse(Arg);
}
}
if (IsVoid) {
LLT PtrTy = MRI->getType(Call->Arguments[0]);
MachineMemOperand *MMO = MIRBuilder.getMF().getMachineMemOperand(
MachinePointerInfo(), MachineMemOperand::MOStore,
PtrTy.getSizeInBytes(), Align(4));
MIRBuilder.buildStore(DestReg, Call->Arguments[0], *MMO);
}
return true;
}

static bool generateLoadStoreInst(const SPIRV::IncomingCall *Call,
MachineIRBuilder &MIRBuilder,
SPIRVGlobalRegistry *GR) {
Expand Down Expand Up @@ -3017,6 +3060,8 @@ std::optional<bool> lowerBuiltin(const StringRef DemangledCall,
return generateTernaryBitwiseFunctionINTELInst(Call.get(), MIRBuilder, GR);
case SPIRV::Block2DLoadStore:
return generate2DBlockIOINTELInst(Call.get(), MIRBuilder, GR);
case SPIRV::ArbitraryFloatingPoint:
return generateAFPInst(Call.get(), MIRBuilder, GR);
case SPIRV::Pipe:
return generatePipeInst(Call.get(), MIRBuilder, GR);
}
Expand Down
44 changes: 44 additions & 0 deletions llvm/lib/Target/SPIRV/SPIRVBuiltins.td
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Expand Up @@ -69,6 +69,7 @@ def ExtendedBitOps : BuiltinGroup;
def BindlessINTEL : BuiltinGroup;
def TernaryBitwiseINTEL : BuiltinGroup;
def Block2DLoadStore : BuiltinGroup;
def ArbitraryFloatingPoint: BuiltinGroup;
def Pipe : BuiltinGroup;

//===----------------------------------------------------------------------===//
Expand Down Expand Up @@ -737,6 +738,49 @@ defm : DemangledNativeBuiltin<"__spirv_CooperativeMatrixStoreCheckedINTEL", Open
defm : DemangledNativeBuiltin<"__spirv_CooperativeMatrixConstructCheckedINTEL", OpenCL_std, CoopMatr, 5, 5, OpCooperativeMatrixConstructCheckedINTEL>;
defm : DemangledNativeBuiltin<"__spirv_CooperativeMatrixGetElementCoordINTEL", OpenCL_std, CoopMatr, 2, 2, OpCooperativeMatrixGetElementCoordINTEL>;

// Arbitrary Precision Floating Point builtin records:
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatGTINTEL", OpenCL_std, ArbitraryFloatingPoint, 4, 4, OpArbitraryFloatGTINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatGEINTEL", OpenCL_std, ArbitraryFloatingPoint, 4, 4, OpArbitraryFloatGEINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatLTINTEL", OpenCL_std, ArbitraryFloatingPoint, 4, 4, OpArbitraryFloatLTINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatLEINTEL", OpenCL_std, ArbitraryFloatingPoint, 4, 4, OpArbitraryFloatLEINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatEQINTEL", OpenCL_std, ArbitraryFloatingPoint, 4, 4, OpArbitraryFloatEQINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatRecipINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatRecipINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatCbrtINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatCbrtINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatHypotINTEL", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatHypotINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatSqrtINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatSqrtINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatLogINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatLogINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatLog2INTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatLog2INTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatLog10INTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatLog10INTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatLog1pINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatLog1pINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatExpINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatExpINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatExp2INTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatExp2INTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatExp10INTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatExp10INTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatExpm1INTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatExpm1INTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatSinINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatSinINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatCosINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatCosINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatSinCosINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatSinCosINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatSinPiINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatSinPiINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatCosPiINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatCosPiINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatSinCosPiINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatSinCosPiINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatAddINTEL", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatAddINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatSubINTEL", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatSubINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatMulINTEL", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatMulINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatDivINTEL", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatDivINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatRSqrtINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatRSqrtINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatASinINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatASinINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatASinPiINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatASinPiINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatACosINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatACosINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatACosPiINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatACosPiINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatATanINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatATanINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatATanPiINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatATanPiINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatATan2INTEL", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatATan2INTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatPowINTEL", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatPowINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatPowRINTEL", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatPowRINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatPowNINTEL", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatPowNINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatCastINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatCastINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatCastFromIntINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatCastFromIntINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatCastToIntINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatCastToIntINTEL>;

// SPV_INTEL_bindless_images builtin records:
defm : DemangledNativeBuiltin<"__spirv_ConvertHandleToImageINTEL", OpenCL_std, BindlessINTEL, 1, 1, OpConvertHandleToImageINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ConvertHandleToSamplerINTEL", OpenCL_std, BindlessINTEL, 1, 1, OpConvertHandleToSamplerINTEL>;
Expand Down
3 changes: 3 additions & 0 deletions llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -53,6 +53,9 @@ static const std::map<std::string, SPIRV::Extension::Extension, std::less<>>
SPIRV::Extension::Extension::SPV_GOOGLE_user_type},
{"SPV_INTEL_arbitrary_precision_integers",
SPIRV::Extension::Extension::SPV_INTEL_arbitrary_precision_integers},
{"SPV_INTEL_arbitrary_precision_floating_point",
SPIRV::Extension::Extension::
SPV_INTEL_arbitrary_precision_floating_point},
{"SPV_INTEL_cache_controls",
SPIRV::Extension::Extension::SPV_INTEL_cache_controls},
{"SPV_INTEL_float_controls2",
Expand Down
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