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[PowerPC] Implement Context Switch Instr mtlpl #160593

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[PowerPC] Implement Context Switch Instr mtlpl #160593

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20 changes: 20 additions & 0 deletions llvm/lib/Target/PowerPC/PPCInstrFuture.td
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Original file line number Diff line number Diff line change
Expand Up @@ -182,6 +182,20 @@ class XX3Form_XTAB6<bits<6> opcode, bits<8> xo, dag OOL, dag IOL, string asmstr,
let Inst{31} = XT{5};
}

class XForm_RBS5<bits<6> opCode, bits<10> xo, dag OOL, dag IOL, string asmstr,
InstrItinClass itin, list<dag> pattern>
: I<opCode, OOL, IOL, asmstr, itin> {

bits<5> RB;
bits<5> RS;

let Pattern = pattern;

let Inst{6...10} = RS;
let Inst{16...20} = RB;
let Inst{21...30} = xo;
}

class XX3Form_XTAB6_S<bits<5> xo, dag OOL, dag IOL, string asmstr,
list<dag> pattern>
: I<59, OOL, IOL, asmstr, NoItinerary> {
Expand Down Expand Up @@ -294,6 +308,12 @@ let Predicates = [IsISAFuture] in {
defm SUBFUS : XOForm_RTAB5_L1r<31, 72, (outs g8rc:$RT),
(ins g8rc:$RA, g8rc:$RB, u1imm:$L), "subfus",
"$RT, $L, $RA, $RB", []>;
def MTLPL : XForm_RBS5<31, 275, (outs), (ins gprc:$RB, gprc:$RS),
"mtlpl $RB, $RS", IIC_SprMTSPR, []>;
let Interpretation64Bit = 1, isCodeGenOnly = 1 in {
def MTLPL8 : XForm_RBS5<31, 275, (outs), (ins g8rc:$RB, g8rc:$RS),
"mtlpl $RB, $RS", IIC_SprMTSPR, []>, isPPC64;
}
}

let Predicates = [HasVSX, IsISAFuture] in {
Expand Down
3 changes: 3 additions & 0 deletions llvm/test/MC/Disassembler/PowerPC/ppc-encoding-ISAFuture.txt
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Expand Up @@ -274,6 +274,9 @@
#CHECK: xvmulhuh 4, 5, 7
0xf0,0x85,0x3b,0xd0

#CHECK: mtlpl 3, 4
0x7c,0x80,0x1a,0x26

#CHECK: xxmulmul 8, 3, 4, 2
0xed,0x03,0x22,0x08

Expand Down
3 changes: 3 additions & 0 deletions llvm/test/MC/Disassembler/PowerPC/ppc64le-encoding-ISAFuture.txt
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Expand Up @@ -268,6 +268,9 @@
#CHECK: xvmulhuh 4, 5, 7
0xd0,0x3b,0x85,0xf0

#CHECK: mtlpl 3, 4
0x26,0x1a,0x80,0x7c

#CHECK: xxmulmul 8, 3, 4, 2
0x08,0x22,0x03,0xed

Expand Down
4 changes: 4 additions & 0 deletions llvm/test/MC/PowerPC/ppc-encoding-ISAFuture.s
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Expand Up @@ -387,6 +387,10 @@
#CHECK-BE: xvmulhuh 4, 5, 7 # encoding: [0xf0,0x85,0x3b,0xd0]
#CHECK-LE: xvmulhuh 4, 5, 7 # encoding: [0xd0,0x3b,0x85,0xf0]

mtlpl 3, 4
#CHECK-BE: mtlpl 3, 4 # encoding: [0x7c,0x80,0x1a,0x26]
#CHECK-LE: mtlpl 3, 4 # encoding: [0x26,0x1a,0x80,0x7c]

xxmulmul 8, 3, 4, 2
#CHECK-BE: xxmulmul 8, 3, 4, 2 # encoding: [0xed,0x03,0x22,0x08]
#CHECK-LE: xxmulmul 8, 3, 4, 2 # encoding: [0x08,0x22,0x03,0xed]
Expand Down
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