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[DAG] foldCONCAT_VECTORS - fold concat_vectors(v1xX insertelt(v,e,0), ...) -> build_vector(e,...) #163420
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… ...) -> build_vector(e,...) Extend the foldCONCAT_VECTORS BUILD_VECTOR construction to handle cases where the scalars have come from <1 x X> vector insertions Fixes llvm#163023
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@llvm/pr-subscribers-llvm-selectiondag @llvm/pr-subscribers-backend-x86 Author: Simon Pilgrim (RKSimon) ChangesExtend the foldCONCAT_VECTORS BUILD_VECTOR construction to handle cases where the scalars have come from <1 x X> vector insertions Fixes #163023 Full diff: https://github.com/llvm/llvm-project/pull/163420.diff 2 Files Affected:
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 876066e968873..9fb45642f5771 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -6416,6 +6416,10 @@ static SDValue foldCONCAT_VECTORS(const SDLoc &DL, EVT VT,
Elts.append(OpVT.getVectorNumElements(), DAG.getUNDEF(SVT));
else if (Op.getOpcode() == ISD::BUILD_VECTOR)
Elts.append(Op->op_begin(), Op->op_end());
+ else if (Op.getOpcode() == ISD::INSERT_VECTOR_ELT &&
+ OpVT.getVectorNumElements() == 1 &&
+ isNullConstant(Op.getOperand(2)))
+ Elts.push_back(Op.getOperand(1));
else
return SDValue();
}
diff --git a/llvm/test/CodeGen/X86/masked_gather_scatter.ll b/llvm/test/CodeGen/X86/masked_gather_scatter.ll
index c658c40a2d636..cdf6bdd2ab184 100644
--- a/llvm/test/CodeGen/X86/masked_gather_scatter.ll
+++ b/llvm/test/CodeGen/X86/masked_gather_scatter.ll
@@ -4768,16 +4768,10 @@ declare void @llvm.masked.scatter.v8f32.v8p0(<8 x float>, <8 x ptr>, i32 immarg,
define <16 x i32> @pr163023(ptr %a0, <16 x i32> %a1) {
; X64-LABEL: pr163023:
; X64: # %bb.0:
-; X64-NEXT: vpmovsxdq %ymm0, %zmm1
-; X64-NEXT: vextracti64x4 $1, %zmm0, %ymm0
-; X64-NEXT: vpmovsxdq %ymm0, %zmm0
; X64-NEXT: kxnorw %k0, %k0, %k1
-; X64-NEXT: vpxor %xmm2, %xmm2, %xmm2
-; X64-NEXT: vpxor %xmm3, %xmm3, %xmm3
-; X64-NEXT: kxnorw %k0, %k0, %k2
-; X64-NEXT: vpgatherqd (%rdi,%zmm0), %ymm3 {%k2}
-; X64-NEXT: vpgatherqd (%rdi,%zmm1), %ymm2 {%k1}
-; X64-NEXT: vinserti64x4 $1, %ymm3, %zmm2, %zmm0
+; X64-NEXT: vpxor %xmm1, %xmm1, %xmm1
+; X64-NEXT: vpgatherdd (%rdi,%zmm0), %zmm1 {%k1}
+; X64-NEXT: vmovdqa64 %zmm1, %zmm0
; X64-NEXT: retq
;
; X86-LABEL: pr163023:
|
| Elts.append(OpVT.getVectorNumElements(), DAG.getUNDEF(SVT)); | ||
| else if (Op.getOpcode() == ISD::BUILD_VECTOR) | ||
| Elts.append(Op->op_begin(), Op->op_end()); | ||
| else if (Op.getOpcode() == ISD::INSERT_VECTOR_ELT && |
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Update the comment above this loop?
topperc
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LGTM
… ...) -> build_vector(e,...) (llvm#163420) Extend the foldCONCAT_VECTORS BUILD_VECTOR construction to handle cases where the scalars have come from <1 x X> vector insertions Fixes llvm#163023
Extend the foldCONCAT_VECTORS BUILD_VECTOR construction to handle cases where the scalars have come from <1 x X> vector insertions
Fixes #163023