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3 changes: 1 addition & 2 deletions llvm/lib/Target/X86/GISel/X86CallLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -280,8 +280,7 @@ bool X86CallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
if (Arg.hasAttribute(Attribute::ByVal) ||
Arg.hasAttribute(Attribute::InReg) ||
Arg.hasAttribute(Attribute::SwiftSelf) ||
Arg.hasAttribute(Attribute::SwiftError) ||
Arg.hasAttribute(Attribute::Nest) || VRegs[Idx].size() > 1)
Arg.hasAttribute(Attribute::SwiftError) || VRegs[Idx].size() > 1)
return false;

if (Arg.hasAttribute(Attribute::StructRet)) {
Expand Down
23 changes: 23 additions & 0 deletions llvm/test/CodeGen/X86/isel-arg-attrs.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,23 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86
; RUN: llc < %s -mtriple=i686-linux-gnu -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X86
; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86
; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64
; RUN: llc < %s -mtriple=x86_64-linux-gnu -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64
; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64

; The src array should be in R10 or ECX register due to nest attribute
define i32 @nest_arg(ptr nest %src) {
; X86-LABEL: nest_arg:
; X86: # %bb.0:
; X86-NEXT: movl 8(%ecx), %eax
; X86-NEXT: retl
;
; X64-LABEL: nest_arg:
; X64: # %bb.0:
; X64-NEXT: movl 8(%r10), %eax
; X64-NEXT: retq
%off = getelementptr [3 x i32], ptr %src, i32 0, i32 2
%ret = load i32, ptr %off
ret i32 %ret
}
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