Skip to content
Open
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
9 changes: 9 additions & 0 deletions llvm/lib/CodeGen/MachineCSE.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -40,6 +40,7 @@
#include "llvm/Pass.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/DebugCounter.h"
#include "llvm/Support/RecyclingAllocator.h"
#include "llvm/Support/raw_ostream.h"
#include <cassert>
Expand All @@ -60,6 +61,9 @@ STATISTIC(NumCrossBBCSEs,
"Number of cross-MBB physreg referencing CS eliminated");
STATISTIC(NumCommutes, "Number of copies coalesced after commuting");

DEBUG_COUNTER(MachineCSECounter, "machine-cse",
"Controls which instructions are removed");

// Threshold to avoid excessive cost to compute isProfitableToCSE.
static cl::opt<int>
CSUsesThreshold("csuses-threshold", cl::Hidden, cl::init(1024),
Expand Down Expand Up @@ -668,6 +672,11 @@ bool MachineCSEImpl::ProcessBlockCSE(MachineBasicBlock *MBB) {
--NumDefs;
}

if (DoCSE && !DebugCounter::shouldExecute(MachineCSECounter)) {
LLVM_DEBUG(dbgs() << "Skip CSE due to debug counter\n");
DoCSE = false;
}

// Actually perform the elimination.
if (DoCSE) {
for (const std::pair<Register, Register> &CSEPair : CSEPairs) {
Expand Down
20 changes: 20 additions & 0 deletions llvm/test/CodeGen/AArch64/debugcounter-machine-cse.mir
Original file line number Diff line number Diff line change
@@ -0,0 +1,20 @@
# RUN: llc -mtriple=aarch64 -run-pass=machine-cse -debug-counter=machine-cse=0-1 -o - %s | FileCheck %s

---
name: debug_counter_machine_cse
body: |
bb.0:
; CHECK-LABEL: name: debug_counter_machine_cse
; CHECK: %0:gpr32 = MOVi32imm 1
; CHECK-NEXT: %1:gpr32 = ADDWrr %0, %0
; CHECK-NEXT: %4:gpr32 = ADDWrr %0, %0
; CHECK-NEXT: $w0 = COPY %4
; CHECK-NEXT: RET_ReallyLR implicit $w0
%0:gpr32 = MOVi32imm 1
%1:gpr32 = ADDWrr %0, %0
%2:gpr32 = ADDWrr %0, %0
%3:gpr32 = ADDWrr %0, %0
%4:gpr32 = ADDWrr %0, %0
$w0 = COPY %4
RET_ReallyLR implicit $w0
...