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[X86] select-copy.mir - regenerate test checks. NFC #166405

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Nov 4, 2025
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[X86] select-copy.mir - regenerate test checks. NFC #166405

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136 changes: 70 additions & 66 deletions llvm/test/CodeGen/X86/GlobalISel/select-copy.mir
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Original file line number Diff line number Diff line change
@@ -1,5 +1,6 @@
# RUN: llc -mtriple=i386-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32
# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -mtriple=i386-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,X86
# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,X64

--- |

Expand Down Expand Up @@ -30,24 +31,23 @@
...
---
name: test_copy
# ALL-LABEL: name: test_copy
alignment: 16
legalized: true
regBankSelected: true
# ALL: registers:
# ALL-NEXT: - { id: 0, class: gr8, preferred-register: '', flags: [ ] }
# ALL-NEXT: - { id: 1, class: gr32, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: gpr, preferred-register: '' }
- { id: 1, class: gpr, preferred-register: '' }
# ALL: %0:gr8 = COPY $al
# ALL-NEXT: %1:gr32 = MOVZX32rr8 %0
# ALL-NEXT: $eax = COPY %1
# ALL-NEXT: RET 0, implicit $eax
body: |
bb.1 (%ir-block.0):
liveins: $eax

; CHECK-LABEL: name: test_copy
; CHECK: liveins: $eax
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gr8 = COPY $al
; CHECK-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY]]
; CHECK-NEXT: $eax = COPY [[MOVZX32rr8_]]
; CHECK-NEXT: RET 0, implicit $eax
%0(s8) = COPY $al
%1(s32) = G_ZEXT %0(s8)
$eax = COPY %1(s32)
Expand All @@ -56,24 +56,23 @@ body: |
...
---
name: test_copy2
# ALL-LABEL: name: test_copy2
alignment: 16
legalized: true
regBankSelected: true
# ALL: registers:
# ALL-NEXT: - { id: 0, class: gr8, preferred-register: '', flags: [ ] }
# ALL-NEXT: - { id: 1, class: gr32, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: gpr, preferred-register: '' }
- { id: 1, class: gpr, preferred-register: '' }
# ALL: %0:gr8 = COPY $al
# ALL-NEXT: %1:gr32 = MOVZX32rr8 %0
# ALL-NEXT: $eax = COPY %1
# ALL-NEXT: RET 0, implicit $eax
body: |
bb.1 (%ir-block.0):
liveins: $eax

; CHECK-LABEL: name: test_copy2
; CHECK: liveins: $eax
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gr8 = COPY $al
; CHECK-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY]]
; CHECK-NEXT: $eax = COPY [[MOVZX32rr8_]]
; CHECK-NEXT: RET 0, implicit $eax
%0(s8) = COPY $al
%1(s32) = G_ZEXT %0(s8)
$eax = COPY %1(s32)
Expand All @@ -82,30 +81,35 @@ body: |
...
---
name: test_copy3
# ALL-LABEL: name: test_copy3
alignment: 16
legalized: true
regBankSelected: true
# ALL: registers:
# ALL-NEXT: - { id: 0, class: gr16[[ABCD:(_abcd)?]], preferred-register: '', flags: [ ] }
# X32-NEXT: - { id: 1, class: gr8_abcd_l, preferred-register: '', flags: [ ] }
# X64-NEXT: - { id: 1, class: gr8, preferred-register: '', flags: [ ] }
# ALL-NEXT: - { id: 2, class: gr32, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: gpr, preferred-register: '' }
- { id: 1, class: gpr, preferred-register: '' }
- { id: 2, class: gpr, preferred-register: '' }
# ALL: %0:gr16 = COPY $ax
# X32-NEXT: %3:gr16_abcd = COPY %0
# X32-NEXT: %1:gr8_abcd_l = COPY %3.sub_8bit
# X64-NEXT: %1:gr8 = COPY %0.sub_8bit
# ALL-NEXT: %2:gr32 = MOVZX32rr8 %1
# ALL-NEXT: $eax = COPY %2
# ALL-NEXT: RET 0, implicit $eax
body: |
bb.1 (%ir-block.0):
liveins: $eax

; X86-LABEL: name: test_copy3
; X86: liveins: $eax
; X86-NEXT: {{ $}}
; X86-NEXT: [[COPY:%[0-9]+]]:gr16 = COPY $ax
; X86-NEXT: [[COPY1:%[0-9]+]]:gr16_abcd = COPY [[COPY]]
; X86-NEXT: [[COPY2:%[0-9]+]]:gr8_abcd_l = COPY [[COPY1]].sub_8bit
; X86-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY2]]
; X86-NEXT: $eax = COPY [[MOVZX32rr8_]]
; X86-NEXT: RET 0, implicit $eax
;
; X64-LABEL: name: test_copy3
; X64: liveins: $eax
; X64-NEXT: {{ $}}
; X64-NEXT: [[COPY:%[0-9]+]]:gr16 = COPY $ax
; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
; X64-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY1]]
; X64-NEXT: $eax = COPY [[MOVZX32rr8_]]
; X64-NEXT: RET 0, implicit $eax
%0(s16) = COPY $ax
%1(s8) = G_TRUNC %0(s16)
%2(s32) = G_ZEXT %1(s8)
Expand All @@ -115,27 +119,25 @@ body: |
...
---
name: test_copy4
# ALL-LABEL: name: test_copy4
alignment: 16
legalized: true
regBankSelected: true
# ALL: registers:
# ALL-NEXT: - { id: 0, class: gr32, preferred-register: '', flags: [ ] }
# ALL-NEXT: - { id: 1, class: gr16, preferred-register: '', flags: [ ] }
# ALL-NEXT: - { id: 2, class: gr32, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: gpr, preferred-register: '' }
- { id: 1, class: gpr, preferred-register: '' }
- { id: 2, class: gpr, preferred-register: '' }
# ALL: %0:gr32 = COPY $eax
# ALL-NEXT: %1:gr16 = COPY %0.sub_16bit
# ALL-NEXT: %2:gr32 = MOVZX32rr16 %1
# ALL-NEXT: $eax = COPY %2
# ALL-NEXT: RET 0, implicit $eax
body: |
bb.1 (%ir-block.0):
liveins: $eax

; CHECK-LABEL: name: test_copy4
; CHECK: liveins: $eax
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $eax
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit
; CHECK-NEXT: [[MOVZX32rr16_:%[0-9]+]]:gr32 = MOVZX32rr16 [[COPY1]]
; CHECK-NEXT: $eax = COPY [[MOVZX32rr16_]]
; CHECK-NEXT: RET 0, implicit $eax
%0(s32) = COPY $eax
%1(s16) = G_TRUNC %0(s32)
%2(s32) = G_ZEXT %1(s16)
Expand All @@ -145,30 +147,35 @@ body: |
...
---
name: test_copy5
# ALL-LABEL: name: test_copy5
alignment: 16
legalized: true
regBankSelected: true
# ALL: registers:
# ALL-NEXT: - { id: 0, class: gr32[[ABCD:(_abcd)?]], preferred-register: '', flags: [ ] }
# X32-NEXT: - { id: 1, class: gr8_abcd_l, preferred-register: '', flags: [ ] }
# X64-NEXT: - { id: 1, class: gr8, preferred-register: '', flags: [ ] }
# ALL-NEXT: - { id: 2, class: gr32, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: gpr, preferred-register: '' }
- { id: 1, class: gpr, preferred-register: '' }
- { id: 2, class: gpr, preferred-register: '' }
# ALL: %0:gr32 = COPY $edx
# X32-NEXT: %3:gr32_abcd = COPY %0
# X32-NEXT: %1:gr8_abcd_l = COPY %3.sub_8bit
# X64-NEXT: %1:gr8 = COPY %0.sub_8bit
# ALL-NEXT: %2:gr32 = MOVZX32rr8 %1
# ALL-NEXT: $eax = COPY %2
# ALL-NEXT: RET 0, implicit $eax
body: |
bb.1 (%ir-block.0):
liveins: $eax,$edx

; X86-LABEL: name: test_copy5
; X86: liveins: $eax, $edx
; X86-NEXT: {{ $}}
; X86-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edx
; X86-NEXT: [[COPY1:%[0-9]+]]:gr32_abcd = COPY [[COPY]]
; X86-NEXT: [[COPY2:%[0-9]+]]:gr8_abcd_l = COPY [[COPY1]].sub_8bit
; X86-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY2]]
; X86-NEXT: $eax = COPY [[MOVZX32rr8_]]
; X86-NEXT: RET 0, implicit $eax
;
; X64-LABEL: name: test_copy5
; X64: liveins: $eax, $edx
; X64-NEXT: {{ $}}
; X64-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edx
; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
; X64-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY1]]
; X64-NEXT: $eax = COPY [[MOVZX32rr8_]]
; X64-NEXT: RET 0, implicit $eax
%0(s32) = COPY $edx
%1(s8) = G_TRUNC %0(s32)
%2(s32) = G_ANYEXT %1(s8)
Expand All @@ -178,29 +185,26 @@ body: |
...
---
name: test_copy6
# ALL-LABEL: name: test_copy6
alignment: 16
legalized: true
regBankSelected: true
# ALL: registers:
# ALL-NEXT: - { id: 0, class: gr32, preferred-register: '', flags: [ ] }
# ALL-NEXT: - { id: 1, class: gr16, preferred-register: '', flags: [ ] }
# ALL-NEXT: - { id: 2, class: low32_addr_access_rbp, preferred-register: '', flags: [ ] }
# ALL-NEXT: - { id: 3, class: low32_addr_access_rbp, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: gpr, preferred-register: '' }
- { id: 1, class: gpr, preferred-register: '' }
- { id: 2, class: gpr, preferred-register: '' }
# ALL: %0:gr32 = COPY $edx
# ALL-NEXT: %1:gr16 = COPY %0.sub_16bit
# ALL-NEXT: %3:low32_addr_access_rbp = IMPLICIT_DEF
# ALL-NEXT: %2:low32_addr_access_rbp = INSERT_SUBREG %3, %1, %subreg.sub_16bit
# ALL-NEXT: $eax = COPY %2
# ALL-NEXT: RET 0, implicit $eax
body: |
bb.1 (%ir-block.0):
liveins: $eax,$edx

; CHECK-LABEL: name: test_copy6
; CHECK: liveins: $eax, $edx
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edx
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit
; CHECK-NEXT: [[DEF:%[0-9]+]]:low32_addr_access_rbp = IMPLICIT_DEF
; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:low32_addr_access_rbp = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_16bit
; CHECK-NEXT: $eax = COPY [[INSERT_SUBREG]]
; CHECK-NEXT: RET 0, implicit $eax
%0(s32) = COPY $edx
%1(s16) = G_TRUNC %0(s32)
%2(s32) = G_ANYEXT %1(s16)
Expand Down
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