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[NFC][TableGen] Adopt CodeGenHelpers in InstrInfoEmitter #166442

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merged 2 commits into from
Nov 6, 2025
Merged

[NFC][TableGen] Adopt CodeGenHelpers in InstrInfoEmitter #166442

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9b5b180
[NFC][TableGen] Adopt CodeGenHelpers in InstrInfoEmitter
jurahul Oct 29, 2025
d19ea82
Review feedback: use SmallString
jurahul Nov 5, 2025
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13 changes: 8 additions & 5 deletions llvm/test/TableGen/RegClassByHwMode.td
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Original file line number Diff line number Diff line change
Expand Up @@ -6,18 +6,21 @@

include "llvm/Target/Target.td"

// INSTRINFO: #ifdef GET_INSTRINFO_ENUM
// INSTRINFO: #ifdef GET_INSTRINFO_ENUM
// INSTRINFO-NEXT: #undef GET_INSTRINFO_ENUM
// INSTRINFO-EMPTY:
// INSTRINFO-NEXT: namespace llvm::MyTarget {
// INSTRINFO-EMPTY:
// INSTRINFO-NEXT: enum {
// INSTRINFO-NEXT: PHI
// INSTRINFO: };
// INSTRINFO: enum RegClassByHwModeUses : uint16_t {
// INSTRINFO-NEXT: PHI
// INSTRINFO: };
// INSTRINFO: enum RegClassByHwModeUses : uint16_t {
// INSTRINFO-NEXT: MyPtrRC,
// INSTRINFO-NEXT: XRegs_EvenIfRequired,
// INSTRINFO-NEXT: YRegs_EvenIfRequired,
// INSTRINFO-NEXT: };
// INSTRINFO-NEXT: }
// INSTRINFO-EMPTY:
// INSTRINFO-NEXT: } // namespace llvm::MyTarget

// INSTRINFO: { MyTarget::XRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
// INSTRINFO: { MyTarget::XRegs_EvenRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
Expand Down
16 changes: 12 additions & 4 deletions llvm/test/TableGen/get-named-operand-idx.td
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Original file line number Diff line number Diff line change
Expand Up @@ -50,7 +50,9 @@ def InstD : InstBase {

// CHECK-LABEL: #ifdef GET_INSTRINFO_OPERAND_ENUM
// CHECK-NEXT: #undef GET_INSTRINFO_OPERAND_ENUM
// CHECK-EMPTY:
// CHECK-NEXT: namespace llvm::MyNamespace {
// CHECK-EMPTY:
// CHECK-NEXT: enum class OpName : uint8_t {
// CHECK-NEXT: a = 0,
// CHECK-NEXT: b = 1,
Expand All @@ -62,12 +64,16 @@ def InstD : InstBase {
// CHECK-EMPTY:
// CHECK-NEXT: LLVM_READONLY int16_t getNamedOperandIdx(uint16_t Opcode, OpName Name);
// CHECK-NEXT: LLVM_READONLY OpName getOperandIdxName(uint16_t Opcode, int16_t Idx);
// CHECK-NEXT: } // end namespace llvm::MyNamespace
// CHECK-NEXT: #endif //GET_INSTRINFO_OPERAND_ENUM
// CHECK-EMPTY:
// CHECK-NEXT: } // namespace llvm::MyNamespace
// CHECK-EMPTY:
// CHECK-NEXT: #endif // GET_INSTRINFO_OPERAND_ENUM

// CHECK-LABEL: #ifdef GET_INSTRINFO_NAMED_OPS
// CHECK-NEXT: #undef GET_INSTRINFO_NAMED_OPS
// CHECK-EMPTY:
// CHECK-NEXT: namespace llvm::MyNamespace {
// CHECK-EMPTY:
// CHECK-NEXT: LLVM_READONLY static uint8_t getInstructionIndexForOpLookup(uint16_t Opcode) {
// CHECK-NEXT: static constexpr uint8_t InstructionIndex[] = {
// CHECK-NEXT: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
Expand Down Expand Up @@ -113,5 +119,7 @@ def InstD : InstBase {
// CHECK-NEXT: unsigned InstrIdx = getInstructionIndexForOpLookup(Opcode);
// CHECK-NEXT: return OperandMap[InstrIdx][(unsigned)Idx];
// CHECK-NEXT: }
// CHECK-NEXT: } // end namespace llvm::MyNamespace
// CHECK-NEXT: #endif //GET_INSTRINFO_NAMED_OPS
// CHECK-EMPTY:
// CHECK-NEXT: } // namespace llvm::MyNamespace
// CHECK-EMPTY:
// CHECK-NEXT: #endif // GET_INSTRINFO_NAMED_OPS
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