[MC][X86/M68k] Emit syntax directive for AT&T

llvm/docs/ReleaseNotes.md

@@ -152,6 +152,8 @@ Changes to the X86 Backend
 
 * `-mcpu=wildcatlake` is now supported.
 * `-mcpu=novalake` is now supported.
+* `.att_syntax` is now emitted at the beginning of the file when emitting AT&T
+  syntax assembly.
 
 Changes to the OCaml bindings
 -----------------------------

llvm/include/llvm/MC/MCStreamer.h

@@ -1055,7 +1055,7 @@ class LLVM_ABI MCStreamer {
   /// Get the .xdata section used for the given section.
   MCSection *getAssociatedXDataSection(const MCSection *TextSec);
 
-  virtual void emitSyntaxDirective();
+  virtual void emitSyntaxDirective(StringRef Syntax, StringRef Options);
 
   /// Record a relocation described by the .reloc directive.
   virtual void emitRelocDirective(const MCExpr &Offset, StringRef Name,

llvm/lib/MC/MCAsmStreamer.cpp

@@ -123,7 +123,7 @@ class MCAsmStreamer final : public MCStreamer {
     EmitCommentsAndEOL();
   }
 
-  void emitSyntaxDirective() override;
+  void emitSyntaxDirective(StringRef Syntax, StringRef Options) override;
 
   void EmitCommentsAndEOL();
 
@@ -796,14 +796,12 @@ void MCAsmStreamer::emitSymbolDesc(MCSymbol *Symbol, unsigned DescValue) {
   EmitEOL();
 }
 
-void MCAsmStreamer::emitSyntaxDirective() {
-  if (MAI->getAssemblerDialect() == 1) {
-    OS << "\t.intel_syntax noprefix";
-    EmitEOL();
+void MCAsmStreamer::emitSyntaxDirective(StringRef Syntax, StringRef Options) {
+  OS << "\t." << Syntax << "_syntax";
+  if (!Options.empty()) {
+    OS << " " << Options;
   }
-  // FIXME: Currently emit unprefix'ed registers.
-  // The intel_syntax directive has one optional argument
-  // with may have a value of prefix or noprefix.
+  EmitEOL();
 }
 
 void MCAsmStreamer::beginCOFFSymbolDef(const MCSymbol *Symbol) {

llvm/lib/MC/MCStreamer.cpp

@@ -876,7 +876,7 @@ MCSection *MCStreamer::getAssociatedXDataSection(const MCSection *TextSec) {
                           TextSec);
 }
 
-void MCStreamer::emitSyntaxDirective() {}
+void MCStreamer::emitSyntaxDirective(StringRef Syntax, StringRef Options) {}
 
 static unsigned encodeSEHRegNum(MCContext &Ctx, MCRegister Reg) {
   return Ctx.getRegisterInfo()->getSEHRegNum(Reg);

llvm/lib/Target/M68k/M68kAsmPrinter.cpp

@@ -190,7 +190,11 @@ void M68kAsmPrinter::emitFunctionBodyStart() {}
 void M68kAsmPrinter::emitFunctionBodyEnd() {}
 
 void M68kAsmPrinter::emitStartOfAsmFile(Module &M) {
-  OutStreamer->emitSyntaxDirective();
+  // m68k assemblers generally don't support .att_syntax so we only emit the
+  // directive for Intel syntax.
+  if (MAI->getAssemblerDialect() == InlineAsm::AD_Intel) {
+    OutStreamer->emitSyntaxDirective("intel", "noprefix");
+  }
 }
 
 void M68kAsmPrinter::emitEndOfAsmFile(Module &M) {}

llvm/lib/Target/X86/X86AsmPrinter.cpp

@@ -932,7 +932,13 @@ void X86AsmPrinter::emitStartOfAsmFile(Module &M) {
     if (M.getModuleFlag("import-call-optimization"))
       EnableImportCallOptimization = true;
   }
-  OutStreamer->emitSyntaxDirective();
+
+  // FIXME: Currently emit unprefix'ed registers.
+  // The intel_syntax directive has one optional argument
+  // with may have a value of prefix or noprefix.
+  const bool IntelSyntax = MAI->getAssemblerDialect() == InlineAsm::AD_Intel;
+  OutStreamer->emitSyntaxDirective(IntelSyntax ? "intel" : "att",
+                                   IntelSyntax ? "noprefix" : "");
 
   // If this is not inline asm and we're in 16-bit
   // mode prefix assembly with .code16.

llvm/test/CodeGen/X86/asm-syntax-directive.ll

@@ -0,0 +1,7 @@
+;; Make sure that we always emit an assembly syntax directive for X86.
+; RUN: llc < %s -mtriple=x86_64 | FileCheck %s --check-prefix=ATT
+; RUN: llc < %s -mtriple=x86_64 -x86-asm-syntax=att | FileCheck %s --check-prefix=ATT
+; RUN: llc < %s -mtriple=x86_64 -x86-asm-syntax=intel | FileCheck %s --check-prefix=INTEL
+
+; INTEL: .intel_syntax noprefix
+; ATT: .att_syntax

llvm/test/CodeGen/X86/coal-sections.ll

@@ -3,7 +3,7 @@
 ; Check that *coal* sections are not emitted.
 
 ; CHECK: .section  __TEXT,__text,regular,pure_instructions{{$}}
-; CHECK-NEXT: .globl  _foo
+; CHECK: .globl  _foo
 
 ; CHECK: .section  __TEXT,__const{{$}}
 ; CHECK-NEXT: .globl  _a