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Nov 11, 2025
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AArch64: Convert tests to opaque pointers #167442

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56 changes: 28 additions & 28 deletions llvm/test/CodeGen/AArch64/aarch64-reassociate-accumulators.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -24,8 +24,8 @@ loop:
%acc_phi = phi <8 x i16> [ zeroinitializer, %entry ], [ %acc_next, %loop ]
%ptr1_i = getelementptr i8, ptr %ptr1, i32 %i
%ptr2_i = getelementptr i8, ptr %ptr2, i32 %i
%a = load <8 x i8>, <8 x i8>* %ptr1_i, align 1
%b = load <8 x i8>, <8 x i8>* %ptr2_i, align 1
%a = load <8 x i8>, ptr %ptr1_i, align 1
%b = load <8 x i8>, ptr %ptr2_i, align 1
%vabd = call <8 x i8> @llvm.aarch64.neon.sabd.v8i8(<8 x i8> %a, <8 x i8> %b)
%vabd_ext = zext <8 x i8> %vabd to <8 x i16>
%acc_next = add <8 x i16> %vabd_ext, %acc_phi
Expand Down Expand Up @@ -65,8 +65,8 @@ loop:
%acc_phi = phi <4 x i32> [ zeroinitializer, %entry ], [ %acc_next, %loop ]
%ptr1_i = getelementptr i16, ptr %ptr1, i32 %i
%ptr2_i = getelementptr i16, ptr %ptr2, i32 %i
%a = load <4 x i16>, <4 x i16>* %ptr1_i, align 1
%b = load <4 x i16>, <4 x i16>* %ptr2_i, align 1
%a = load <4 x i16>, ptr %ptr1_i, align 1
%b = load <4 x i16>, ptr %ptr2_i, align 1
%vabd = tail call <4 x i16> @llvm.aarch64.neon.sabd.v4i16(<4 x i16> %a, <4 x i16> %b)
%vmov = zext <4 x i16> %vabd to <4 x i32>
%acc_next = add <4 x i32> %vmov, %acc_phi
Expand Down Expand Up @@ -116,8 +116,8 @@ loop:
%acc_phi_lo = phi <8 x i16> [ zeroinitializer, %entry ], [ %acc_next_lo, %loop ]
%ptr1_i = getelementptr i8, ptr %ptr1, i32 %i
%ptr2_i = getelementptr i8, ptr %ptr2, i32 %i
%a = load <16 x i8>, <16 x i8>* %ptr1_i, align 1
%b = load <16 x i8>, <16 x i8>* %ptr2_i, align 1
%a = load <16 x i8>, ptr %ptr1_i, align 1
%b = load <16 x i8>, ptr %ptr2_i, align 1
%a_hi = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
%b_hi = shufflevector <16 x i8> %b, <16 x i8> zeroinitializer, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
%a_lo = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
Expand Down Expand Up @@ -160,8 +160,8 @@ loop:
%acc_phi = phi <4 x i32> [ zeroinitializer, %entry ], [ %acc_next, %loop ]
%ptr1_i = getelementptr i32, ptr %ptr1, i32 %i
%ptr2_i = getelementptr i32, ptr %ptr2, i32 %i
%a = load <4 x i32>, <4 x i32>* %ptr1_i, align 1
%b = load <4 x i32>, <4 x i32>* %ptr2_i, align 1
%a = load <4 x i32>, ptr %ptr1_i, align 1
%b = load <4 x i32>, ptr %ptr2_i, align 1
%vabd = tail call <4 x i32> @llvm.aarch64.neon.uabd.v4i32(<4 x i32> %a, <4 x i32> %b)
%acc_next = add <4 x i32> %acc_phi, %vabd
%next_i = add i32 %i, 4
Expand Down Expand Up @@ -198,8 +198,8 @@ loop:
; Load values from ptr1 and ptr2
%ptr1_i = getelementptr i32, ptr %ptr1, i32 %i
%ptr2_i = getelementptr i32, ptr %ptr2, i32 %i
%a = load <4 x i32>, <4 x i32>* %ptr1_i, align 1
%b = load <4 x i32>, <4 x i32>* %ptr2_i, align 1
%a = load <4 x i32>, ptr %ptr1_i, align 1
%b = load <4 x i32>, ptr %ptr2_i, align 1
; Perform the intrinsic operation
%vabd = tail call <4 x i32> @llvm.aarch64.neon.sabd.v4i32(<4 x i32> %a, <4 x i32> %b)
%acc_next = add <4 x i32> %acc_phi, %vabd
Expand Down Expand Up @@ -237,8 +237,8 @@ loop:
%acc_phi = phi <2 x i32> [ zeroinitializer, %entry ], [ %acc_next, %loop ]
%ptr1_i = getelementptr i32, ptr %ptr1, i32 %i
%ptr2_i = getelementptr i32, ptr %ptr2, i32 %i
%a = load <2 x i32>, <2 x i32>* %ptr1_i, align 1
%b = load <2 x i32>, <2 x i32>* %ptr2_i, align 1
%a = load <2 x i32>, ptr %ptr1_i, align 1
%b = load <2 x i32>, ptr %ptr2_i, align 1
%vabd = tail call <2 x i32> @llvm.aarch64.neon.uabd.v2i32(<2 x i32> %a, <2 x i32> %b)
%acc_next = add <2 x i32> %acc_phi, %vabd
%next_i = add i32 %i, 2
Expand Down Expand Up @@ -272,8 +272,8 @@ loop:
%acc_phi = phi <8 x i8> [ zeroinitializer, %entry ], [ %acc_next, %loop ]
%ptr1_i = getelementptr i8, ptr %ptr1, i32 %i
%ptr2_i = getelementptr i8, ptr %ptr2, i32 %i
%a = load <8 x i8>, <8 x i8>* %ptr1_i, align 1
%b = load <8 x i8>, <8 x i8>* %ptr2_i, align 1
%a = load <8 x i8>, ptr %ptr1_i, align 1
%b = load <8 x i8>, ptr %ptr2_i, align 1
%vabd = tail call <8 x i8> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> %a, <8 x i8> %b)
%acc_next = add <8 x i8> %acc_phi, %vabd
%next_i = add i32 %i, 8
Expand Down Expand Up @@ -307,8 +307,8 @@ loop:
%acc_phi = phi <16 x i8> [ zeroinitializer, %entry ], [ %acc_next, %loop ]
%ptr1_i = getelementptr i8, ptr %ptr1, i32 %i
%ptr2_i = getelementptr i8, ptr %ptr2, i32 %i
%a = load <16 x i8>, <16 x i8>* %ptr1_i, align 1
%b = load <16 x i8>, <16 x i8>* %ptr2_i, align 1
%a = load <16 x i8>, ptr %ptr1_i, align 1
%b = load <16 x i8>, ptr %ptr2_i, align 1
%vabd = tail call <16 x i8> @llvm.aarch64.neon.uabd.v16i8(<16 x i8> %a, <16 x i8> %b)
%acc_next = add <16 x i8> %acc_phi, %vabd
%next_i = add i32 %i, 16
Expand Down Expand Up @@ -342,8 +342,8 @@ loop:
%acc_phi = phi <8 x i16> [ zeroinitializer, %entry ], [ %acc_next, %loop ]
%ptr1_i = getelementptr i16, ptr %ptr1, i32 %i
%ptr2_i = getelementptr i16, ptr %ptr2, i32 %i
%a = load <8 x i16>, <8 x i16>* %ptr1_i, align 1
%b = load <8 x i16>, <8 x i16>* %ptr2_i, align 1
%a = load <8 x i16>, ptr %ptr1_i, align 1
%b = load <8 x i16>, ptr %ptr2_i, align 1
%vabd = tail call <8 x i16> @llvm.aarch64.neon.uabd.v8i16(<8 x i16> %a, <8 x i16> %b)
%acc_next = add <8 x i16> %acc_phi, %vabd
%next_i = add i32 %i, 8
Expand Down Expand Up @@ -377,8 +377,8 @@ loop:
%acc_phi = phi <8 x i8> [ zeroinitializer, %entry ], [ %acc_next, %loop ]
%ptr1_i = getelementptr i8, ptr %ptr1, i32 %i
%ptr2_i = getelementptr i8, ptr %ptr2, i32 %i
%a = load <8 x i8>, <8 x i8>* %ptr1_i, align 1
%b = load <8 x i8>, <8 x i8>* %ptr2_i, align 1
%a = load <8 x i8>, ptr %ptr1_i, align 1
%b = load <8 x i8>, ptr %ptr2_i, align 1
%vabd = tail call <8 x i8> @llvm.aarch64.neon.sabd.v8i8(<8 x i8> %a, <8 x i8> %b)
%acc_next = add <8 x i8> %acc_phi, %vabd
%next_i = add i32 %i, 8
Expand Down Expand Up @@ -411,8 +411,8 @@ loop:
%acc_phi = phi <4 x i16> [ zeroinitializer, %entry ], [ %acc_next, %loop ]
%ptr1_i = getelementptr i16, ptr %ptr1, i32 %i
%ptr2_i = getelementptr i16, ptr %ptr2, i32 %i
%a = load <4 x i16>, <4 x i16>* %ptr1_i, align 1
%b = load <4 x i16>, <4 x i16>* %ptr2_i, align 1
%a = load <4 x i16>, ptr %ptr1_i, align 1
%b = load <4 x i16>, ptr %ptr2_i, align 1
%vabd = tail call <4 x i16> @llvm.aarch64.neon.sabd.v4i16(<4 x i16> %a, <4 x i16> %b)
%acc_next = add <4 x i16> %acc_phi, %vabd
%next_i = add i32 %i, 4
Expand Down Expand Up @@ -445,8 +445,8 @@ loop:
%acc_phi = phi <8 x i16> [ zeroinitializer, %entry ], [ %acc_next, %loop ]
%ptr1_i = getelementptr i16, ptr %ptr1, i32 %i
%ptr2_i = getelementptr i16, ptr %ptr2, i32 %i
%a = load <8 x i16>, <8 x i16>* %ptr1_i, align 1
%b = load <8 x i16>, <8 x i16>* %ptr2_i, align 1
%a = load <8 x i16>, ptr %ptr1_i, align 1
%b = load <8 x i16>, ptr %ptr2_i, align 1
%vabd = tail call <8 x i16> @llvm.aarch64.neon.sabd.v8i16(<8 x i16> %a, <8 x i16> %b)
%acc_next = add <8 x i16> %acc_phi, %vabd
%next_i = add i32 %i, 8
Expand Down Expand Up @@ -480,8 +480,8 @@ loop:
%acc_phi = phi <8 x i16> [ zeroinitializer, %entry ], [ %acc_next, %loop ]
%ptr1_i = getelementptr i8, ptr %ptr1, i32 %i
%ptr2_i = getelementptr i8, ptr %ptr2, i32 %i
%a = load <8 x i8>, <8 x i8>* %ptr1_i, align 1
%b = load <8 x i8>, <8 x i8>* %ptr2_i, align 1
%a = load <8 x i8>, ptr %ptr1_i, align 1
%b = load <8 x i8>, ptr %ptr2_i, align 1
%vabd = tail call <8 x i8> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> %a, <8 x i8> %b)
%vmov = zext <8 x i8> %vabd to <8 x i16>
%acc_next = add <8 x i16> %vmov, %acc_phi
Expand Down Expand Up @@ -516,8 +516,8 @@ loop:
%acc_phi = phi <4 x i32> [ zeroinitializer, %entry ], [ %acc_next, %loop ]
%ptr1_i = getelementptr i16, ptr %ptr1, i32 %i
%ptr2_i = getelementptr i16, ptr %ptr2, i32 %i
%a = load <4 x i16>, <4 x i16>* %ptr1_i, align 1
%b = load <4 x i16>, <4 x i16>* %ptr2_i, align 1
%a = load <4 x i16>, ptr %ptr1_i, align 1
%b = load <4 x i16>, ptr %ptr2_i, align 1
%vabd = tail call <4 x i16> @llvm.aarch64.neon.uabd.v4i16(<4 x i16> %a, <4 x i16> %b)
%vmov = zext <4 x i16> %vabd to <4 x i32>
%acc_next = add <4 x i32> %vmov, %acc_phi
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/AArch64/cgdata-merge-local.ll
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Expand Up @@ -54,9 +54,9 @@
define i32 @f1(i32 %a) {
entry:
%idxprom = sext i32 %a to i64
%arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i64 0, i64 %idxprom
%0 = load i32, i32* %arrayidx, align 4
%1 = load volatile i32, i32* @g1, align 4
%arrayidx = getelementptr inbounds [0 x i32], ptr @g, i64 0, i64 %idxprom
%0 = load i32, ptr %arrayidx, align 4
%1 = load volatile i32, ptr @g1, align 4
%mul = mul nsw i32 %1, %0
%add = add nsw i32 %mul, 1
ret i32 %add
Expand All @@ -65,9 +65,9 @@ entry:
define i32 @f2(i32 %a) {
entry:
%idxprom = sext i32 %a to i64
%arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i64 0, i64 %idxprom
%0 = load i32, i32* %arrayidx, align 4
%1 = load volatile i32, i32* @g2, align 4
%arrayidx = getelementptr inbounds [0 x i32], ptr @g, i64 0, i64 %idxprom
%0 = load i32, ptr %arrayidx, align 4
%1 = load volatile i32, ptr @g2, align 4
%mul = mul nsw i32 %1, %0
%add = add nsw i32 %mul, 1
ret i32 %add
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/AArch64/cgdata-merge-no-params.ll
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Expand Up @@ -19,9 +19,9 @@
define i32 @f1(i32 %a) {
entry:
%idxprom = sext i32 %a to i64
%arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i64 0, i64 %idxprom
%0 = load i32, i32* %arrayidx, align 4
%1 = load volatile i32, i32* @g1, align 4
%arrayidx = getelementptr inbounds [0 x i32], ptr @g, i64 0, i64 %idxprom
%0 = load i32, ptr %arrayidx, align 4
%1 = load volatile i32, ptr @g1, align 4
%mul = mul nsw i32 %1, %0
%add = add nsw i32 %mul, 1
ret i32 %add
Expand All @@ -30,9 +30,9 @@ entry:
define i32 @f2(i32 %a) {
entry:
%idxprom = sext i32 %a to i64
%arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i64 0, i64 %idxprom
%0 = load i32, i32* %arrayidx, align 4
%1 = load volatile i32, i32* @g1, align 4
%arrayidx = getelementptr inbounds [0 x i32], ptr @g, i64 0, i64 %idxprom
%0 = load i32, ptr %arrayidx, align 4
%1 = load volatile i32, ptr @g1, align 4
%mul = mul nsw i32 %1, %0
%add = add nsw i32 %mul, 1
ret i32 %add
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/AArch64/cgdata-no-merge-unnamed.ll
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Expand Up @@ -12,9 +12,9 @@
define i32 @0(i32 %a) {
entry:
%idxprom = sext i32 %a to i64
%arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i64 0, i64 %idxprom
%0 = load i32, i32* %arrayidx, align 4
%1 = load volatile i32, i32* @g1, align 4
%arrayidx = getelementptr inbounds [0 x i32], ptr @g, i64 0, i64 %idxprom
%0 = load i32, ptr %arrayidx, align 4
%1 = load volatile i32, ptr @g1, align 4
%mul = mul nsw i32 %1, %0
%add = add nsw i32 %mul, 1
ret i32 %add
Expand All @@ -23,9 +23,9 @@ entry:
define i32 @1(i32 %a) {
entry:
%idxprom = sext i32 %a to i64
%arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i64 0, i64 %idxprom
%0 = load i32, i32* %arrayidx, align 4
%1 = load volatile i32, i32* @g2, align 4
%arrayidx = getelementptr inbounds [0 x i32], ptr @g, i64 0, i64 %idxprom
%0 = load i32, ptr %arrayidx, align 4
%1 = load volatile i32, ptr @g2, align 4
%mul = mul nsw i32 %1, %0
%add = add nsw i32 %mul, 1
ret i32 %add
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/AArch64/divrem.ll
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Expand Up @@ -2,7 +2,7 @@

; SDIVREM/UDIVREM DAG nodes are generated but expanded when lowering and
; should not generate select error.
define <2 x i32> @test_udivrem(<2 x i32> %x, < 2 x i32> %y, < 2 x i32>* %z) {
define <2 x i32> @test_udivrem(<2 x i32> %x, < 2 x i32> %y, ptr %z) {
; CHECK-LABEL: test_udivrem
; CHECK-DAG: udivrem
; CHECK-NOT: LLVM ERROR: Cannot select
Expand All @@ -12,10 +12,10 @@ define <2 x i32> @test_udivrem(<2 x i32> %x, < 2 x i32> %y, < 2 x i32>* %z) {
ret <2 x i32> %1
}

define <4 x i32> @test_sdivrem(<4 x i32> %x, ptr %y) {
define <4 x i32> @test_sdivrem(<4 x i32> %x, ptr %y) {
; CHECK-LABEL: test_sdivrem
; CHECK-DAG: sdivrem
%div = sdiv <4 x i32> %x, < i32 20, i32 20, i32 20, i32 20 >
%div = sdiv <4 x i32> %x, < i32 20, i32 20, i32 20, i32 20 >
store <4 x i32> %div, ptr %y
%1 = srem <4 x i32> %x, < i32 20, i32 20, i32 20, i32 20 >
ret <4 x i32> %1
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AArch64/ldp-stp-scaled-unscaled-pairs.ll
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Expand Up @@ -85,7 +85,7 @@ define i64 @test_ldrsw_ldursw(ptr %p) #0 {
; CHECK-NEXT: add.2d v0, v[[V0]], v[[V1]]
; CHECK-NEXT: ret
define <2 x i64> @test_ldrq_ldruq_invalidoffset(ptr %p) #0 {
%tmp1 = load <2 x i64>, < 2 x i64>* %p, align 8
%tmp1 = load <2 x i64>, ptr %p, align 8
%add.ptr2 = getelementptr inbounds i64, ptr %p, i64 3
%tmp2 = load <2 x i64>, ptr %add.ptr2, align 8
%add = add nsw <2 x i64> %tmp1, %tmp2
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/AArch64/machine-outliner-iterative.mir
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Expand Up @@ -6,17 +6,17 @@
#
#; define void @"$s12"(...) { define i64 @"$s5” (...) { define void @"$s13"(...) {
# ... ... ...
# %8 = load i1, i1* %7 %8 = load i1, i1* %7
# %9 = load i4, i4*, %6 %9 = load i4, i4*, %6 %9 = load i4, i4*, %6
# store i4 %9, i4* %5 store i4 %9, i4* %5 store i4 %9, i4* %5
# %8 = load i1, ptr %7 %8 = load i1, ptr %7
# %9 = load i4, ptr, %6 %9 = load i4, ptr, %6 %9 = load i4, ptr, %6
# store i4 %9, ptr %5 store i4 %9, ptr %5 store i4 %9, ptr %5
# ... ... ...
# } } }
#
# After machine outliner (1st time)
#
# define void @"$s12"(...) { define i64 @"$s5” (...) { define void @"$s13"(...) {
# ... ... ...
# %8 = load i1, i1* %7 %8 = load i1, i1* %7
# %8 = load i1, ptr %7 %8 = load i1, ptr %7
# call void @outlined_function_1_1 call void @outlined_function_1_1 call void @outlined_function_1_1
# ... ... ...
# } } }
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AArch64/misched-fusion-cmp-bcc.ll
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Expand Up @@ -15,10 +15,10 @@
; RUN: llc %s -o - -O0 -mtriple=aarch64-unknown -mcpu=ampere1b | FileCheck %s


define void @test_cmp_bcc_fusion(i32 %x, i32 %y, i32* %arr) {
define void @test_cmp_bcc_fusion(i32 %x, i32 %y, ptr %arr) {
entry:
%cmp = icmp eq i32 %x, %y
store i32 %x, i32* %arr, align 4
store i32 %x, ptr %arr, align 4
br i1 %cmp, label %if_true, label %if_false

if_true:
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AArch64/no-quad-ldp-stp.ll
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Expand Up @@ -19,7 +19,7 @@ define void @test_nopair_st(ptr %ptr, <2 x double> %v1, <2 x double> %v2) {
; SLOW-NOT: ldp
; FAST: ldp
define <2 x i64> @test_nopair_ld(ptr %p) {
%tmp1 = load <2 x i64>, < 2 x i64>* %p, align 8
%tmp1 = load <2 x i64>, ptr %p, align 8
%add.ptr2 = getelementptr inbounds i64, ptr %p, i64 2
%tmp2 = load <2 x i64>, ptr %add.ptr2, align 8
%add = add nsw <2 x i64> %tmp1, %tmp2
Expand Down
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