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19 changes: 0 additions & 19 deletions llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -6219,25 +6219,6 @@ SDValue DAGCombiner::visitIMINMAX(SDNode *N) {
SDLoc(N), VT, N0, N1))
return SD;

if (TLI.isOperationLegalOrCustom(ISD::USUBO, VT) &&
!TLI.isOperationLegalOrCustom(ISD::UMIN, VT)) {
SDValue B;

// (umin (sub a, b), a) -> (usubo a, b); (select usubo.1, a, usubo.0)
if (sd_match(N0, m_Sub(m_Specific(N1), m_Value(B)))) {
SDVTList VTs = DAG.getVTList(VT, getSetCCResultType(VT));
SDValue USO = DAG.getNode(ISD::USUBO, DL, VTs, N1, B);
return DAG.getSelect(DL, VT, USO.getValue(1), N1, USO.getValue(0));
}

// (umin a, (sub a, b)) -> (usubo a, b); (select usubo.1, a, usubo.0)
if (sd_match(N1, m_Sub(m_Specific(N0), m_Value(B)))) {
SDVTList VTs = DAG.getVTList(VT, getSetCCResultType(VT));
SDValue USO = DAG.getNode(ISD::USUBO, DL, VTs, N0, B);
return DAG.getSelect(DL, VT, USO.getValue(1), N0, USO.getValue(0));
}
}

// Simplify the operands using demanded-bits information.
if (SimplifyDemandedBits(SDValue(N, 0)))
return SDValue(N, 0);
Expand Down
151 changes: 0 additions & 151 deletions llvm/test/CodeGen/AArch64/umin-sub-to-usubo-select-combine.ll

This file was deleted.

156 changes: 0 additions & 156 deletions llvm/test/CodeGen/X86/umin-sub-to-usubo-select-combine.ll

This file was deleted.

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