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[AArch64][GlobalISel] Add better basic legalization for llround. #168427

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merged 1 commit into from
Nov 18, 2025
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[AArch64][GlobalISel] Add better basic legalization for llround. #168427

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12 changes: 12 additions & 0 deletions llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3439,6 +3439,18 @@ LegalizerHelper::widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy) {
Observer.changedInstr(MI);
return Legalized;
}
case TargetOpcode::G_LROUND:
case TargetOpcode::G_LLROUND:
Observer.changingInstr(MI);

if (TypeIdx == 0)
widenScalarDst(MI, WideTy);
else
widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_FPEXT);

Observer.changedInstr(MI);
return Legalized;

case TargetOpcode::G_INTTOPTR:
if (TypeIdx != 1)
return UnableToLegalize;
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8 changes: 5 additions & 3 deletions llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
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Expand Up @@ -449,10 +449,12 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
.minScalar(0, s32)
.libcallFor({{s32, s32}, {s64, s32}, {s128, s32}});

// TODO: Libcall support for s128.
// TODO: s16 should be legal with full FP16 support.
getActionDefinitionsBuilder({G_LROUND, G_LLROUND})
.legalFor({{s64, s32}, {s64, s64}});
.legalFor({{s64, s32}, {s64, s64}})
.legalFor(HasFP16, {{s64, s16}})
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@Lukacma Lukacma Nov 19, 2025

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Is there a specific reason why {s32, s16} and {s32, s64} is not legal for LROUND here? If I understand correctly, that's how it is for SelectionDAG

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@davemgreen davemgreen Nov 19, 2025

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Are you meaning the windows variants? The l and ll in lround/llround stand for long and long-long AFAIU. (You could argue that info shouldn't be present in IR intrinsics). So on linux where long is 64bit you would only expect a i64, on windows i32 would be used for lround. We haven't tried to support windows for them yet, there is a separate test case. If we can generate instructions for them then hopefully we can just always support them, irrespective of whether it is windows or not, providing we do not need to generate a libcall.

.minScalar(0, s64)
.minScalar(1, s32)
.libcallFor({{s64, s128}});

// TODO: Custom legalization for mismatched types.
getActionDefinitionsBuilder(G_FCOPYSIGN)
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8 changes: 2 additions & 6 deletions llvm/test/CodeGen/AArch64/llround-conv-fp16.ll
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@@ -1,12 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc < %s -mtriple=aarch64 | FileCheck %s --check-prefixes=CHECK-NOFP16
; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 | FileCheck %s --check-prefixes=CHECK-FP16
; RUN: llc < %s -mtriple=aarch64 -global-isel -global-isel-abort=2 2>&1 | FileCheck %s --check-prefixes=CHECK-NOFP16,CHECK-GI
; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 -global-isel -global-isel-abort=2 2>&1 | FileCheck %s --check-prefixes=CHECK-FP16,CHECK-GI

; CHECK-GI: warning: Instruction selection used fallback path for testmhhs
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for testmhws
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for testmhxs
; RUN: llc < %s -mtriple=aarch64 -global-isel | FileCheck %s --check-prefixes=CHECK-NOFP16
; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 -global-isel | FileCheck %s --check-prefixes=CHECK-FP16

define i16 @testmhhs(half %x) {
; CHECK-NOFP16-LABEL: testmhhs:
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5 changes: 1 addition & 4 deletions llvm/test/CodeGen/AArch64/llround-conv.ll
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@@ -1,9 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc < %s -mtriple=aarch64 -mattr=+neon | FileCheck %s
; RUN: llc < %s -mtriple=aarch64 -mattr=+neon -global-isel -global-isel-abort=2 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI

; CHECK-GI: warning: Instruction selection used fallback path for testmswl
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for testmsll
; RUN: llc < %s -mtriple=aarch64 -mattr=+neon -global-isel | FileCheck %s

define i32 @testmsws(float %x) {
; CHECK-LABEL: testmsws:
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8 changes: 2 additions & 6 deletions llvm/test/CodeGen/AArch64/lround-conv-fp16.ll
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@@ -1,12 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc < %s -mtriple=aarch64 | FileCheck %s --check-prefixes=CHECK-NOFP16
; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 | FileCheck %s --check-prefixes=CHECK-FP16
; RUN: llc < %s -mtriple=aarch64 -global-isel -global-isel-abort=2 2>&1 | FileCheck %s --check-prefixes=CHECK-NOFP16,CHECK-GI
; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 -global-isel -global-isel-abort=2 2>&1 | FileCheck %s --check-prefixes=CHECK-FP16,CHECK-GI

; CHECK-GI: warning: Instruction selection used fallback path for testmhhs
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for testmhws
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for testmhxs
; RUN: llc < %s -mtriple=aarch64 -global-isel | FileCheck %s --check-prefixes=CHECK-NOFP16
; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 -global-isel | FileCheck %s --check-prefixes=CHECK-FP16

define i16 @testmhhs(half %x) {
; CHECK-NOFP16-LABEL: testmhhs:
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5 changes: 1 addition & 4 deletions llvm/test/CodeGen/AArch64/lround-conv.ll
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@@ -1,9 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc < %s -mtriple=aarch64 -mattr=+neon | FileCheck %s
; RUN: llc < %s -mtriple=aarch64 -mattr=+neon -global-isel -global-isel-abort=2 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI

; CHECK-GI: warning: Instruction selection used fallback path for testmswl
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for testmsll
; RUN: llc < %s -mtriple=aarch64 -mattr=+neon -global-isel | FileCheck %s

define i32 @testmsws(float %x) {
; CHECK-LABEL: testmsws:
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