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[SPARC][clang] Add condition code register names for inline asm #168498

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Nov 19, 2025
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[SPARC][clang] Add condition code register names for inline asm #168498

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0139d65
[SPARC][clang] Add condition code register names for inline asm
koachan Nov 18, 2025
cbc89c3
Add tests and match names with GCC ones
koachan Nov 18, 2025
61c5983
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koachan Nov 18, 2025
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5 changes: 5 additions & 0 deletions clang/lib/Basic/Targets/Sparc.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,7 @@ using namespace clang;
using namespace clang::targets;

const char *const SparcTargetInfo::GCCRegNames[] = {
// clang-format off
// Integer registers
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
"r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", "r20", "r21",
Expand All @@ -30,6 +31,10 @@ const char *const SparcTargetInfo::GCCRegNames[] = {
"f22", "f23", "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", "f32",
"f34", "f36", "f38", "f40", "f42", "f44", "f46", "f48", "f50", "f52", "f54",
"f56", "f58", "f60", "f62",

// Condition code registers
"icc", "fcc0", "fcc1", "fcc2", "fcc3",
// clang-format on
};

ArrayRef<const char *> SparcTargetInfo::getGCCRegNames() const {
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13 changes: 13 additions & 0 deletions clang/test/CodeGen/Sparc/inline-asm-gcc-regs.c
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@@ -0,0 +1,13 @@
// RUN: %clang_cc1 -triple sparc-unknown-unknown -emit-llvm %s -o - | FileCheck %s

// CHECK-LABEL: @icc
// CHECK: call void asm sideeffect "nop", "~{icc}"()
void icc() {
__asm__ __volatile__("nop" ::: "icc");
}

// CHECK-LABEL: @fcc
// CHECK: call void asm sideeffect "nop", "~{fcc0},~{fcc1},~{fcc2},~{fcc3}"()
void fcc() {
__asm__ __volatile__("nop" ::: "fcc0", "fcc1", "fcc2", "fcc3");
}