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[Attributor] Support nested conditional branches #168532

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[Attributor] Support nested conditional branches #168532

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afd3668
Re-generate llvm/test/Transforms/Attributor/nonnull.ll
c-rhodes Nov 17, 2025
a8459e1
[Attributor] Support nested conditional branches
c-rhodes Nov 17, 2025
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32 changes: 10 additions & 22 deletions llvm/lib/Transforms/IPO/AttributorAttributes.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -665,7 +665,10 @@ static void followUsesInMBEC(AAType &AA, Attributor &A, StateType &S,
return;

SmallVector<const BranchInst *, 4> BrInsts;
SmallPtrSet<const Instruction *, 16> Visited;
auto Pred = [&](const Instruction *I) {
if (!Visited.insert(I).second)
return false;
if (const BranchInst *Br = dyn_cast<BranchInst>(I))
if (Br->isConditional())
BrInsts.push_back(Br);
Expand All @@ -684,28 +687,10 @@ static void followUsesInMBEC(AAType &AA, Attributor &A, StateType &S,
// ParentS_m = ChildS_{m, 1} /\ ChildS_{m, 2} /\ ... /\ ChildS_{m, n_m}
//
// Known State |= ParentS_1 \/ ParentS_2 \/... \/ ParentS_m
//
// FIXME: Currently, recursive branches are not handled. For example, we
// can't deduce that ptr must be dereferenced in below function.
//
// void f(int a, int c, int *ptr) {
// if(a)
// if (b) {
// *ptr = 0;
// } else {
// *ptr = 1;
// }
// else {
// if (b) {
// *ptr = 0;
// } else {
// *ptr = 1;
// }
// }
// }

Explorer->checkForAllContext(&CtxI, Pred);
for (const BranchInst *Br : BrInsts) {
while (!BrInsts.empty()) {
const BranchInst *Br = BrInsts.pop_back_val();
StateType ParentState;

// The known state of the parent state is a conjunction of children's
Expand All @@ -714,15 +699,18 @@ static void followUsesInMBEC(AAType &AA, Attributor &A, StateType &S,

for (const BasicBlock *BB : Br->successors()) {
StateType ChildState;

size_t BeforeSize = Uses.size();
followUsesInContext(AA, A, *Explorer, &BB->front(), Uses, ChildState);
const Instruction *I = &BB->front();
followUsesInContext(AA, A, *Explorer, I, Uses, ChildState);

// Erase uses which only appear in the child.
for (auto It = Uses.begin() + BeforeSize; It != Uses.end();)
It = Uses.erase(It);

ParentState &= ChildState;

// Check for recursive conditional branches.
Explorer->checkForAllContext(I, Pred);
}

// Use only known state.
Expand Down
9 changes: 3 additions & 6 deletions llvm/test/Transforms/Attributor/dereferenceable-1.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -555,12 +555,10 @@ cont2:
; *ptr = 4;
; }
; }
;
; FIXME: %ptr should be dereferenceable(4)
define dso_local void @rec-branch-1(i32 %a, i32 %b, i32 %c, ptr %ptr) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write)
; CHECK-LABEL: define {{[^@]+}}@rec-branch-1
; CHECK-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], ptr nofree writeonly captures(none) [[PTR:%.*]]) #[[ATTR3]] {
; CHECK-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], ptr nofree nonnull writeonly align 4 captures(none) dereferenceable(4) [[PTR:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[A]], 0
; CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_ELSE3:%.*]], label [[IF_THEN:%.*]]
Expand Down Expand Up @@ -630,11 +628,10 @@ if.end8: ; preds = %if.then5, %if.else6
; rec-branch-2(1, 1, 1, ptr);
; }
; }
; FIXME: %ptr should be dereferenceable(4)
define dso_local void @rec-branch-2(i32 %a, i32 %b, i32 %c, ptr %ptr) {
; CHECK: Function Attrs: nofree nosync nounwind memory(argmem: write)
; CHECK-LABEL: define {{[^@]+}}@rec-branch-2
; CHECK-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], ptr nofree writeonly captures(none) [[PTR:%.*]]) #[[ATTR5:[0-9]+]] {
; CHECK-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], ptr nofree nonnull writeonly align 4 captures(none) dereferenceable(4) [[PTR:%.*]]) #[[ATTR5:[0-9]+]] {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[A]], 0
; CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_ELSE3:%.*]], label [[IF_THEN:%.*]]
Expand All @@ -654,7 +651,7 @@ define dso_local void @rec-branch-2(i32 %a, i32 %b, i32 %c, ptr %ptr) {
; CHECK-NEXT: store i32 3, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[IF_END8]]
; CHECK: if.else6:
; CHECK-NEXT: tail call void @rec-branch-2(i32 noundef 1, i32 noundef 1, i32 noundef 1, ptr nofree writeonly captures(none) [[PTR]]) #[[ATTR8:[0-9]+]]
; CHECK-NEXT: tail call void @rec-branch-2(i32 noundef 1, i32 noundef 1, i32 noundef 1, ptr nofree nonnull writeonly align 4 captures(none) dereferenceable(4) [[PTR]]) #[[ATTR8:[0-9]+]]
; CHECK-NEXT: br label [[IF_END8]]
; CHECK: if.end8:
; CHECK-NEXT: ret void
Expand Down
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