[AMDGPU] Propagate AA info in vector load/store splitting.

[PeddleSpam]

Fixes a bug in AMDGPUISelLowering where alias analysis info is not propagated to split loads and stores.

This is required for #161375

[llvmbot]

@llvm/pr-subscribers-backend-amdgpu

Author: Leon Clark (PeddleSpam)

Changes

---

Full diff: https://github.com/llvm/llvm-project/pull/168871.diff

1 Files Affected:

• (modified) llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp (+7-4)

diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
index a44af5f854c18..1233ceaca00e0 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
@@ -1887,12 +1887,14 @@ SDValue AMDGPUTargetLowering::SplitVectorLoad(const SDValue Op,
 
   SDValue LoLoad = DAG.getExtLoad(Load->getExtensionType(), SL, LoVT,
                                   Load->getChain(), BasePtr, SrcValue, LoMemVT,
-                                  BaseAlign, Load->getMemOperand()->getFlags());
+                                  BaseAlign, Load->getMemOperand()->getFlags(),
+                                  Load->getAAInfo());
   SDValue HiPtr = DAG.getObjectPtrOffset(SL, BasePtr, TypeSize::getFixed(Size));
   SDValue HiLoad =
       DAG.getExtLoad(Load->getExtensionType(), SL, HiVT, Load->getChain(),
                      HiPtr, SrcValue.getWithOffset(LoMemVT.getStoreSize()),
-                     HiMemVT, HiAlign, Load->getMemOperand()->getFlags());
+                     HiMemVT, HiAlign, Load->getMemOperand()->getFlags(),
+                     Load->getAAInfo());
 
   SDValue Join;
   if (LoVT == HiVT) {
@@ -1980,10 +1982,11 @@ SDValue AMDGPUTargetLowering::SplitVectorStore(SDValue Op,
 
   SDValue LoStore =
       DAG.getTruncStore(Chain, SL, Lo, BasePtr, SrcValue, LoMemVT, BaseAlign,
-                        Store->getMemOperand()->getFlags());
+                        Store->getMemOperand()->getFlags(), Store->getAAInfo());
   SDValue HiStore =
       DAG.getTruncStore(Chain, SL, Hi, HiPtr, SrcValue.getWithOffset(Size),
-                        HiMemVT, HiAlign, Store->getMemOperand()->getFlags());
+                        HiMemVT, HiAlign, Store->getMemOperand()->getFlags(),
+                        Store->getAAInfo());
 
   return DAG.getNode(ISD::TokenFactor, SL, MVT::Other, LoStore, HiStore);
 }

[github-actions]

✅ With the latest revision this PR passed the C/C++ code formatter.

[github-actions]

🐧 Linux x64 Test Results

• 186423 tests passed
• 4863 tests skipped

[dobbelaj-snps]

The code change looks good to me. For the testcase: If this is indeed a splitload/store, I would expect to see multiple load/stores in the CHECK ?

[PeddleSpam]

The code change looks good to me. For the testcase: If this is indeed a splitload/store, I would expect to see multiple load/stores in the CHECK ?

Thanks, I'll add checks for the other loads and stores.

[dobbelaj-snps]

As you are focusing on alias analysis, I would also make sure that the alias.scope / noalias id's for the loads are identical, as wel as those for the stores. It even makes sense to try to match them to the metadata declarations of these id's. (Not sure how hard that is to add).