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[AArch64] Add patterns for add(x, trunc(shift)) #168927

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[AArch64] Add patterns for add(x, trunc(shift)) #168927

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8 changes: 8 additions & 0 deletions llvm/lib/Target/AArch64/AArch64InstrInfo.td
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Original file line number Diff line number Diff line change
Expand Up @@ -2752,6 +2752,14 @@ def : Pat<(AArch64sub_flag GPR64:$Rn, neg_addsub_shifted_imm64:$imm),
(ADDSXri GPR64:$Rn, neg_addsub_shifted_imm64:$imm)>;
}

// Patterns for (add X, trunc(shift(Y))), for which we can generate 64bit instructions.
def : Pat<(add GPR32:$Rn, (trunc arith_shifted_reg64:$Rm)),
(EXTRACT_SUBREG (ADDXrs (INSERT_SUBREG (IMPLICIT_DEF), GPR32:$Rn, sub_32),
arith_shifted_reg64:$Rm), sub_32)>;
def : Pat<(sub GPR32:$Rn, (trunc arith_shifted_reg64:$Rm)),
(EXTRACT_SUBREG (SUBXrs (INSERT_SUBREG (IMPLICIT_DEF), GPR32:$Rn, sub_32),
arith_shifted_reg64:$Rm), sub_32)>;

def : InstAlias<"neg $dst, $src",
(SUBWrs GPR32:$dst, WZR,
(arith_shifted_reg32 GPR32:$src, 0)), 3>;
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28 changes: 15 additions & 13 deletions llvm/test/CodeGen/AArch64/combine-sdiv.ll
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Expand Up @@ -1493,13 +1493,12 @@ define i5 @combine_i5_sdiv_const7(i5 %x) {
; CHECK-SD-LABEL: combine_i5_sdiv_const7:
; CHECK-SD: // %bb.0:
; CHECK-SD-NEXT: // kill: def $w0 killed $w0 def $x0
; CHECK-SD-NEXT: mov x8, #-56173 // =0xffffffffffff2493
; CHECK-SD-NEXT: sbfx x9, x0, #0, #5
; CHECK-SD-NEXT: movk x8, #37449, lsl #16
; CHECK-SD-NEXT: smull x8, w9, w8
; CHECK-SD-NEXT: lsl w9, w0, #27
; CHECK-SD-NEXT: lsr x8, x8, #32
; CHECK-SD-NEXT: add w8, w8, w9, asr #27
; CHECK-SD-NEXT: sbfx x8, x0, #0, #5
; CHECK-SD-NEXT: mov x9, #-56173 // =0xffffffffffff2493
; CHECK-SD-NEXT: movk x9, #37449, lsl #16
; CHECK-SD-NEXT: smull x8, w8, w9
; CHECK-SD-NEXT: sbfx w9, w0, #0, #5
; CHECK-SD-NEXT: add x8, x9, x8, lsr #32
; CHECK-SD-NEXT: asr w9, w8, #2
; CHECK-SD-NEXT: add w0, w9, w8, lsr #31
; CHECK-SD-NEXT: ret
Expand Down Expand Up @@ -1646,21 +1645,21 @@ define i32 @combine_i32_sdiv_const7(i32 %x) {
; CHECK-SD-LABEL: combine_i32_sdiv_const7:
; CHECK-SD: // %bb.0:
; CHECK-SD-NEXT: mov w8, #9363 // =0x2493
; CHECK-SD-NEXT: // kill: def $w0 killed $w0 def $x0
; CHECK-SD-NEXT: movk w8, #37449, lsl #16
; CHECK-SD-NEXT: smull x8, w0, w8
; CHECK-SD-NEXT: lsr x8, x8, #32
; CHECK-SD-NEXT: add w8, w8, w0
; CHECK-SD-NEXT: add x8, x0, x8, lsr #32
; CHECK-SD-NEXT: asr w9, w8, #2
; CHECK-SD-NEXT: add w0, w9, w8, lsr #31
; CHECK-SD-NEXT: ret
;
; CHECK-GI-LABEL: combine_i32_sdiv_const7:
; CHECK-GI: // %bb.0:
; CHECK-GI-NEXT: mov w8, #9363 // =0x2493
; CHECK-GI-NEXT: // kill: def $w0 killed $w0 def $x0
; CHECK-GI-NEXT: movk w8, #37449, lsl #16
; CHECK-GI-NEXT: smull x8, w0, w8
; CHECK-GI-NEXT: asr x8, x8, #32
; CHECK-GI-NEXT: add w8, w8, w0
; CHECK-GI-NEXT: add x8, x0, x8, asr #32
; CHECK-GI-NEXT: asr w8, w8, #2
; CHECK-GI-NEXT: add w0, w8, w8, lsr #31
; CHECK-GI-NEXT: ret
Expand All @@ -1674,8 +1673,11 @@ define i32 @combine_i32_sdiv_const100(i32 %x) {
; CHECK-SD-NEXT: mov w8, #34079 // =0x851f
; CHECK-SD-NEXT: movk w8, #20971, lsl #16
; CHECK-SD-NEXT: smull x8, w0, w8
; CHECK-SD-NEXT: asr x8, x8, #37
; CHECK-SD-NEXT: add w0, w8, w8, lsr #31
; CHECK-SD-NEXT: asr x9, x8, #37
; CHECK-SD-NEXT: lsr w9, w9, #31
; CHECK-SD-NEXT: // kill: def $w9 killed $w9 killed $x9 def $x9
; CHECK-SD-NEXT: add x0, x9, x8, asr #37
; CHECK-SD-NEXT: // kill: def $w0 killed $w0 killed $x0
; CHECK-SD-NEXT: ret
;
; CHECK-GI-LABEL: combine_i32_sdiv_const100:
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