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@topperc topperc commented Nov 20, 2025

This removes an unnecessary isel pattern for the RV32 HwMode.

This removes an unnecessary pattern for the RV32 HwMode.
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llvmbot commented Nov 20, 2025

@llvm/pr-subscribers-backend-risc-v

Author: Craig Topper (topperc)

Changes

This removes an unnecessary isel pattern for the RV32 HwMode.


Full diff: https://github.com/llvm/llvm-project/pull/168932.diff

1 Files Affected:

  • (modified) llvm/lib/Target/RISCV/RISCVInstrInfoP.td (+1-1)
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoP.td b/llvm/lib/Target/RISCV/RISCVInstrInfoP.td
index 764e3c9c58355..51339d66f6de1 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoP.td
@@ -1461,7 +1461,7 @@ let Predicates = [HasStdExtP, IsRV32] in {
 // Codegen patterns
 //===----------------------------------------------------------------------===//
 
-def riscv_absw : RVSDNode<"ABSW", SDTIntUnaryOp>;
+def riscv_absw : RVSDNode<"ABSW", SDT_RISCVIntUnaryOpW>;
 
 def SDT_RISCVPASUB : SDTypeProfile<1, 2, [SDTCisVec<0>,
                                           SDTCisInt<0>,

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🐧 Linux x64 Test Results

  • 186426 tests passed
  • 4868 tests skipped

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LGTM

@topperc topperc merged commit a9435cb into llvm:main Nov 20, 2025
10 of 11 checks passed
@topperc topperc deleted the pr/absw-typeprofile branch November 20, 2025 23:01
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3 participants