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[NFC] Refactor TargetLowering::getTgtMemIntrinsic to take CallBase parameter #170334

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Merged
ro-i merged 1 commit into from
Dec 2, 2025
Merged

[NFC] Refactor TargetLowering::getTgtMemIntrinsic to take CallBase parameter #170334

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2 changes: 1 addition & 1 deletion llvm/include/llvm/CodeGen/TargetLowering.h
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Expand Up @@ -1243,7 +1243,7 @@ class LLVM_ABI TargetLoweringBase {
/// to a MemIntrinsicNode (touches memory). If this is the case, it returns
/// true and store the intrinsic information into the IntrinsicInfo that was
/// passed to the function.
virtual bool getTgtMemIntrinsic(IntrinsicInfo &, const CallInst &,
virtual bool getTgtMemIntrinsic(IntrinsicInfo &, const CallBase &,
MachineFunction &,
unsigned /*Intrinsic*/) const {
return false;
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4 changes: 2 additions & 2 deletions llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
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Expand Up @@ -17227,7 +17227,7 @@ SDValue AArch64TargetLowering::LowerVSCALE(SDValue Op,
template <unsigned NumVecs>
static bool
setInfoSVEStN(const AArch64TargetLowering &TLI, const DataLayout &DL,
AArch64TargetLowering::IntrinsicInfo &Info, const CallInst &CI) {
AArch64TargetLowering::IntrinsicInfo &Info, const CallBase &CI) {
Info.opc = ISD::INTRINSIC_VOID;
// Retrieve EC from first vector argument.
const EVT VT = TLI.getMemValueType(DL, CI.getArgOperand(0)->getType());
Expand All @@ -17252,7 +17252,7 @@ setInfoSVEStN(const AArch64TargetLowering &TLI, const DataLayout &DL,
/// MemIntrinsicNodes. The associated MachineMemOperands record the alignment
/// specified in the intrinsic calls.
bool AArch64TargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
const CallInst &I,
const CallBase &I,
MachineFunction &MF,
unsigned Intrinsic) const {
auto &DL = I.getDataLayout();
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2 changes: 1 addition & 1 deletion llvm/lib/Target/AArch64/AArch64ISelLowering.h
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Expand Up @@ -206,7 +206,7 @@ class AArch64TargetLowering : public TargetLowering {
EmitInstrWithCustomInserter(MachineInstr &MI,
MachineBasicBlock *MBB) const override;

bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallBase &I,
MachineFunction &MF,
unsigned Intrinsic) const override;

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4 changes: 2 additions & 2 deletions llvm/lib/Target/AMDGPU/SIISelLowering.cpp
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Expand Up @@ -1308,7 +1308,7 @@ static unsigned getIntrMemWidth(unsigned IntrID) {
}
}

static void getCoopAtomicOperandsInfo(const CallInst &CI, bool IsLoad,
static void getCoopAtomicOperandsInfo(const CallBase &CI, bool IsLoad,
TargetLoweringBase::IntrinsicInfo &Info) {
Value *OrderingArg = CI.getArgOperand(IsLoad ? 1 : 2);
unsigned Ord = cast<ConstantInt>(OrderingArg)->getZExtValue();
Expand Down Expand Up @@ -1338,7 +1338,7 @@ static void getCoopAtomicOperandsInfo(const CallInst &CI, bool IsLoad,
}

bool SITargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
const CallInst &CI,
const CallBase &CI,
MachineFunction &MF,
unsigned IntrID) const {
Info.flags = MachineMemOperand::MONone;
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2 changes: 1 addition & 1 deletion llvm/lib/Target/AMDGPU/SIISelLowering.h
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Expand Up @@ -332,7 +332,7 @@ class SITargetLowering final : public AMDGPUTargetLowering {
MVT getPointerTy(const DataLayout &DL, unsigned AS) const override;
MVT getPointerMemTy(const DataLayout &DL, unsigned AS) const override;

bool getTgtMemIntrinsic(IntrinsicInfo &, const CallInst &,
bool getTgtMemIntrinsic(IntrinsicInfo &, const CallBase &,
MachineFunction &MF,
unsigned IntrinsicID) const override;

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2 changes: 1 addition & 1 deletion llvm/lib/Target/ARM/ARMISelLowering.cpp
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Expand Up @@ -20665,7 +20665,7 @@ bool ARMTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT,
/// MemIntrinsicNodes. The associated MachineMemOperands record the alignment
/// specified in the intrinsic calls.
bool ARMTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
const CallInst &I,
const CallBase &I,
MachineFunction &MF,
unsigned Intrinsic) const {
switch (Intrinsic) {
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3 changes: 1 addition & 2 deletions llvm/lib/Target/ARM/ARMISelLowering.h
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Expand Up @@ -315,8 +315,7 @@ class VectorType;
bool isFPImmLegal(const APFloat &Imm, EVT VT,
bool ForCodeSize = false) const override;

bool getTgtMemIntrinsic(IntrinsicInfo &Info,
const CallInst &I,
bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallBase &I,
MachineFunction &MF,
unsigned Intrinsic) const override;

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2 changes: 1 addition & 1 deletion llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
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Expand Up @@ -2115,7 +2115,7 @@ static Value *getUnderLyingObjectForBrevLdIntr(Value *V) {
/// true and store the intrinsic information into the IntrinsicInfo that was
/// passed to the function.
bool HexagonTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
const CallInst &I,
const CallBase &I,
MachineFunction &MF,
unsigned Intrinsic) const {
switch (Intrinsic) {
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2 changes: 1 addition & 1 deletion llvm/lib/Target/Hexagon/HexagonISelLowering.h
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Expand Up @@ -145,7 +145,7 @@ class HexagonTargetLowering : public TargetLowering {
const SmallVectorImpl<SDValue> &OutVals,
const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG& DAG) const;

bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallBase &I,
MachineFunction &MF,
unsigned Intrinsic) const override;

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2 changes: 1 addition & 1 deletion llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
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Expand Up @@ -8912,7 +8912,7 @@ bool LoongArchTargetLowering::hasAndNot(SDValue Y) const {
}

bool LoongArchTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
const CallInst &I,
const CallBase &I,
MachineFunction &MF,
unsigned Intrinsic) const {
switch (Intrinsic) {
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2 changes: 1 addition & 1 deletion llvm/lib/Target/LoongArch/LoongArchISelLowering.h
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Expand Up @@ -78,7 +78,7 @@ class LoongArchTargetLowering : public TargetLowering {
Value *NewVal, Value *Mask,
AtomicOrdering Ord) const override;

bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallBase &I,
MachineFunction &MF,
unsigned Intrinsic) const override;

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7 changes: 4 additions & 3 deletions llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
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Expand Up @@ -4077,9 +4077,10 @@ void NVPTXTargetLowering::LowerAsmOperandForConstraint(
// because we need the information that is only available in the "Value" type
// of destination
// pointer. In particular, the address space information.
bool NVPTXTargetLowering::getTgtMemIntrinsic(
IntrinsicInfo &Info, const CallInst &I,
MachineFunction &MF, unsigned Intrinsic) const {
bool NVPTXTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
const CallBase &I,
MachineFunction &MF,
unsigned Intrinsic) const {
switch (Intrinsic) {
default:
return false;
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2 changes: 1 addition & 1 deletion llvm/lib/Target/NVPTX/NVPTXISelLowering.h
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Expand Up @@ -32,7 +32,7 @@ class NVPTXTargetLowering : public TargetLowering {
const NVPTXSubtarget &STI);
SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;

bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallBase &I,
MachineFunction &MF,
unsigned Intrinsic) const override;

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2 changes: 1 addition & 1 deletion llvm/lib/Target/PowerPC/PPCISelLowering.cpp
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Expand Up @@ -18495,7 +18495,7 @@ PPCTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
}

bool PPCTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
const CallInst &I,
const CallBase &I,
MachineFunction &MF,
unsigned Intrinsic) const {
switch (Intrinsic) {
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3 changes: 1 addition & 2 deletions llvm/lib/Target/PowerPC/PPCISelLowering.h
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Expand Up @@ -492,8 +492,7 @@ namespace llvm {

bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override;

bool getTgtMemIntrinsic(IntrinsicInfo &Info,
const CallInst &I,
bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallBase &I,
MachineFunction &MF,
unsigned Intrinsic) const override;

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2 changes: 1 addition & 1 deletion llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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Expand Up @@ -1868,7 +1868,7 @@ bool RISCVTargetLowering::shouldExpandCttzElements(EVT VT) const {
}

bool RISCVTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
const CallInst &I,
const CallBase &I,
MachineFunction &MF,
unsigned Intrinsic) const {
auto &DL = I.getDataLayout();
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2 changes: 1 addition & 1 deletion llvm/lib/Target/RISCV/RISCVISelLowering.h
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Expand Up @@ -35,7 +35,7 @@ class RISCVTargetLowering : public TargetLowering {

const RISCVSubtarget &getSubtarget() const { return Subtarget; }

bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallBase &I,
MachineFunction &MF,
unsigned Intrinsic) const override;
bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
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2 changes: 1 addition & 1 deletion llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
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Expand Up @@ -94,7 +94,7 @@ MVT SPIRVTargetLowering::getRegisterTypeForCallingConv(LLVMContext &Context,
}

bool SPIRVTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
const CallInst &I,
const CallBase &I,
MachineFunction &MF,
unsigned Intrinsic) const {
unsigned AlignIdx = 3;
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2 changes: 1 addition & 1 deletion llvm/lib/Target/SPIRV/SPIRVISelLowering.h
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Expand Up @@ -48,7 +48,7 @@ class SPIRVTargetLowering : public TargetLowering {
EVT VT) const override;
MVT getRegisterTypeForCallingConv(LLVMContext &Context, CallingConv::ID CC,
EVT VT) const override;
bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallBase &I,
MachineFunction &MF,
unsigned Intrinsic) const override;

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2 changes: 1 addition & 1 deletion llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
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Expand Up @@ -1060,7 +1060,7 @@ EVT WebAssemblyTargetLowering::getSetCCResultType(const DataLayout &DL,
}

bool WebAssemblyTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
const CallInst &I,
const CallBase &I,
MachineFunction &MF,
unsigned Intrinsic) const {
switch (Intrinsic) {
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2 changes: 1 addition & 1 deletion llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h
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Expand Up @@ -58,7 +58,7 @@ class WebAssemblyTargetLowering final : public TargetLowering {
bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override;
EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
EVT VT) const override;
bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallBase &I,
MachineFunction &MF,
unsigned Intrinsic) const override;

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2 changes: 1 addition & 1 deletion llvm/lib/Target/X86/X86ISelLowering.cpp
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Expand Up @@ -3104,7 +3104,7 @@ static bool useVPTERNLOG(const X86Subtarget &Subtarget, MVT VT) {
}

bool X86TargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
const CallInst &I,
const CallBase &I,
MachineFunction &MF,
unsigned Intrinsic) const {
Info.flags = MachineMemOperand::MONone;
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2 changes: 1 addition & 1 deletion llvm/lib/Target/X86/X86ISelLowering.h
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Expand Up @@ -1482,7 +1482,7 @@ namespace llvm {
/// to a MemIntrinsicNode (touches memory). If this is the case, it returns
/// true and stores the intrinsic information into the IntrinsicInfo that was
/// passed to the function.
bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallBase &I,
MachineFunction &MF,
unsigned Intrinsic) const override;

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