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@4vtomat 4vtomat commented Dec 4, 2025

This is followup patch of #170589

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llvmbot commented Dec 4, 2025

@llvm/pr-subscribers-backend-risc-v

Author: Brandon Wu (4vtomat)

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This is followup patch of #170589


Full diff: https://github.com/llvm/llvm-project/pull/170601.diff

15 Files Affected:

  • (modified) llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte16.ll (+2-7)
  • (modified) llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte32.ll (+2-7)
  • (modified) llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte64.ll (+2-7)
  • (modified) llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte8.ll (+2-7)
  • (modified) llvm/test/CodeGen/RISCV/rvv/sifive_sf_vsettk.ll (+2-7)
  • (modified) llvm/test/CodeGen/RISCV/rvv/sifive_sf_vsettm.ll (+2-7)
  • (modified) llvm/test/CodeGen/RISCV/rvv/sifive_sf_vsettnt.ll (+2-7)
  • (modified) llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste16.ll (+2-7)
  • (modified) llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste32.ll (+2-7)
  • (modified) llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste64.ll (+2-7)
  • (modified) llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste8.ll (+2-7)
  • (modified) llvm/test/CodeGen/RISCV/rvv/sifive_sf_vtdiscard.ll (+2-7)
  • (modified) llvm/test/CodeGen/RISCV/rvv/sifive_sf_vtmv_t_v.ll (+2-5)
  • (modified) llvm/test/CodeGen/RISCV/rvv/sifive_sf_vtmv_v_t.ll (+2-5)
  • (modified) llvm/test/CodeGen/RISCV/rvv/sifive_sf_vtzero_t.ll (+2-7)
diff --git a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte16.ll b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte16.ll
index 8df930e4ce3dc..89afa7bc59b0b 100644
--- a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte16.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte16.ll
@@ -1,12 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
-; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
 
 define dso_local void @test_sf_vlte16(iXLen %tss, ptr %base, iXLen %vl) {
diff --git a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte32.ll b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte32.ll
index 3e1ac2688d569..f586791d7e3e1 100644
--- a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte32.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte32.ll
@@ -1,12 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
-; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
 
 define dso_local void @test_sf_vlte32(iXLen %tss, ptr %base, iXLen %vl) {
diff --git a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte64.ll b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte64.ll
index 315839794af8c..f5eed7970f8d8 100644
--- a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte64.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte64.ll
@@ -1,12 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
-; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
 
 define dso_local void @test_sf_vlte64(iXLen %tss, ptr %base, iXLen %vl) {
diff --git a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte8.ll b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte8.ll
index 7451ef286ffc8..557a0b6a94ce4 100644
--- a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte8.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte8.ll
@@ -1,12 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
-; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
 
 define dso_local void @test_sf_vlte8(iXLen %tss, ptr %base, iXLen %vl) {
diff --git a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vsettk.ll b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vsettk.ll
index b8b2c0c3a709b..4ea4ce86ddf54 100644
--- a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vsettk.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vsettk.ll
@@ -1,12 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
-; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
 
 define iXLen @test_sf_vsettk(iXLen %tk) {
diff --git a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vsettm.ll b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vsettm.ll
index 5d5970726d643..79079417c5171 100644
--- a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vsettm.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vsettm.ll
@@ -1,12 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
-; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
 
 define iXLen @test_sf_vsettm(iXLen %tm) {
diff --git a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vsettnt.ll b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vsettnt.ll
index 07584899fbcac..f2d47b56ef1dd 100644
--- a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vsettnt.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vsettnt.ll
@@ -1,12 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
-; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
 
 define iXLen @test_sf_vsettnt_e8w1(iXLen %tn) {
diff --git a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste16.ll b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste16.ll
index 9e76b8b3172f5..1f2668a21c6bf 100644
--- a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste16.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste16.ll
@@ -1,12 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
-; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
 
 define dso_local void @test_sf_vste16(iXLen %tss, ptr %base, iXLen %vl) {
diff --git a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste32.ll b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste32.ll
index 086bb347fd45a..c812c2233f2a7 100644
--- a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste32.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste32.ll
@@ -1,12 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
-; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
 
 define dso_local void @test_sf_vste32(iXLen %tss, ptr %base, iXLen %vl) {
diff --git a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste64.ll b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste64.ll
index cff4f78fa8817..257972ad2e963 100644
--- a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste64.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste64.ll
@@ -1,12 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
-; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
 
 define dso_local void @test_sf_vste64(iXLen %tss, ptr %base, iXLen %vl) {
diff --git a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste8.ll b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste8.ll
index 3e080bec0878b..e543bfbae49a9 100644
--- a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste8.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste8.ll
@@ -1,12 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
-; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
 
 define dso_local void @test_sf_vste8(iXLen %tss, ptr %base, iXLen %vl) {
diff --git a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vtdiscard.ll b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vtdiscard.ll
index b98b7216bdb8d..f0563c1573e23 100644
--- a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vtdiscard.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vtdiscard.ll
@@ -1,12 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
-; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
 
 define dso_local void @test_sf_vtdiscard() {
diff --git a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vtmv_t_v.ll b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vtmv_t_v.ll
index f551e48a5ef10..616941c8fa077 100644
--- a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vtmv_t_v.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vtmv_t_v.ll
@@ -1,12 +1,9 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
 ; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN:   -mattr=+zvfhmin -mattr=+zvfbfmin -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
 ; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN:   -mattr=+zvfhmin -mattr=+zvfbfmin -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
 
 define void @test_sf_vtmv_t_v_bf16m8(iXLen %tss, <vscale x 32 x bfloat> %src, iXLen %vl) {
diff --git a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vtmv_v_t.ll b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vtmv_v_t.ll
index 33445b59cca1c..a0d2dcf3112b4 100644
--- a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vtmv_v_t.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vtmv_v_t.ll
@@ -1,12 +1,9 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
 ; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN:   -mattr=+zvfhmin -mattr=+zvfbfmin -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
 ; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN:   -mattr=+zvfhmin -mattr=+zvfbfmin -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
 
 define <vscale x 32 x bfloat> @test_sf_vtmv_v_t_bf16m8(iXLen %tss, iXLen %vl) {
diff --git a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vtzero_t.ll b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vtzero_t.ll
index 3ae5ec09be4dd..cbcaa32d25b40 100644
--- a/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vtzero_t.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/sifive_sf_vtzero_t.ll
@@ -1,12 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
-; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \
-; RUN:   -mattr=+zvfh -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+experimental-zvfbfmin -mattr=+xsfmmbase \
-; RUN:   -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+xsfmmbase \
 ; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
 
 define void @test_sf_vtzero_t(iXLen %tm, iXLen %tn) {

@4vtomat 4vtomat requested review from tclin914 and topperc December 4, 2025 04:11
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LGTM

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LGTM

@4vtomat 4vtomat enabled auto-merge (squash) December 4, 2025 06:31
@4vtomat 4vtomat merged commit 0fa066b into llvm:main Dec 4, 2025
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kcloudy0717 pushed a commit to kcloudy0717/llvm-project that referenced this pull request Dec 4, 2025
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4 participants