[Clang] Use DataLayout from TargetParser #171135
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This switches clang to use the data layouts from TargetParser, instead of maintaining its own copy of data layouts, which are required to match the backend data layouts. For now I've kept explicit calls to resetDataLayout(), just with the argument implied by the triple and ABI. Ideally this would happen automatically, but the way these classes are initialized currently doesn't offer a great place to do this. Previously resetDataLayout() also set the UserLabelPrefix. I've separated this out, with a reasonable default so that most targets don't need to worry about it. I've kept the explicit data layouts for TCE and SPIR (without the V). These seem to not correspond to real LLVM targets. I've also fixed the XCore data layout in TargetParser, which was incorrectly set to the same one as Xtensa. It was previously unused.
llvmbot
added
backend:ARM
backend:AArch64
backend:AMDGPU
backend:Hexagon
backend:MIPS
backend:MSP430
backend:RISC-V
backend:PowerPC
backend:Sparc
backend:SystemZ
backend:WebAssembly
clang:frontend
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@llvm/pr-subscribers-backend-xtensa @llvm/pr-subscribers-backend-powerpc Author: Nikita Popov (nikic) ChangesThis switches clang to use the data layouts from TargetParser, instead of maintaining its own copy of data layouts, which are required to match the backend data layouts. For now I've kept explicit calls to resetDataLayout(), just with the argument implied by the triple and ABI. Ideally this would happen automatically, but the way these classes are initialized currently doesn't offer a great place to do this. Previously resetDataLayout() also set the UserLabelPrefix. I've separated this out, with a reasonable default so that most targets don't need to worry about it. I've kept the explicit data layouts for TCE and SPIR (without the V). These seem to not correspond to real LLVM targets. I've also fixed the XCore data layout in TargetParser, which was incorrectly set to the same one as Xtensa. It was previously unused. Patch is 39.11 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/171135.diff 31 Files Affected:
diff --git a/clang/include/clang/Basic/TargetInfo.h b/clang/include/clang/Basic/TargetInfo.h
index 1f5932225d31e..885325c3379e3 100644
--- a/clang/include/clang/Basic/TargetInfo.h
+++ b/clang/include/clang/Basic/TargetInfo.h
@@ -296,9 +296,11 @@ class TargetInfo : public TransferrableTargetInfo,
// TargetInfo Constructor. Default initializes all fields.
TargetInfo(const llvm::Triple &T);
- // UserLabelPrefix must match DL's getGlobalPrefix() when interpreted
- // as a DataLayout object.
- void resetDataLayout(StringRef DL, const char *UserLabelPrefix = "");
+ /// Set the data layout to the given string.
+ void resetDataLayout(StringRef DL);
+
+ /// Set the data layout based on current triple and ABI.
+ void resetDataLayout();
// Target features that are read-only and should not be disabled/enabled
// by command line options. Such features are for emitting predefined
diff --git a/clang/lib/Basic/TargetInfo.cpp b/clang/lib/Basic/TargetInfo.cpp
index c0ed900ebd45c..7e82213be4479 100644
--- a/clang/lib/Basic/TargetInfo.cpp
+++ b/clang/lib/Basic/TargetInfo.cpp
@@ -156,7 +156,7 @@ TargetInfo::TargetInfo(const llvm::Triple &T) : Triple(T) {
Float128Format = &llvm::APFloat::IEEEquad();
Ibm128Format = &llvm::APFloat::PPCDoubleDouble();
MCountName = "mcount";
- UserLabelPrefix = "_";
+ UserLabelPrefix = Triple.isOSBinFormatMachO() ? "_" : "";
RegParmMax = 0;
SSERegParmMax = 0;
HasAlignMac68kSupport = false;
@@ -196,9 +196,10 @@ TargetInfo::TargetInfo(const llvm::Triple &T) : Triple(T) {
// Out of line virtual dtor for TargetInfo.
TargetInfo::~TargetInfo() {}
-void TargetInfo::resetDataLayout(StringRef DL, const char *ULP) {
- DataLayoutString = DL.str();
- UserLabelPrefix = ULP;
+void TargetInfo::resetDataLayout(StringRef DL) { DataLayoutString = DL.str(); }
+
+void TargetInfo::resetDataLayout() {
+ DataLayoutString = Triple.computeDataLayout(getABI());
}
bool
diff --git a/clang/lib/Basic/Targets/AArch64.cpp b/clang/lib/Basic/Targets/AArch64.cpp
index d7f36c0f9b79a..476fa829bef61 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -1212,7 +1212,7 @@ bool AArch64TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
HasD128 = false;
}
- setDataLayout();
+ resetDataLayout();
if (HasNoFP) {
FPU &= ~FPUMode;
@@ -1628,21 +1628,6 @@ AArch64leTargetInfo::AArch64leTargetInfo(const llvm::Triple &Triple,
const TargetOptions &Opts)
: AArch64TargetInfo(Triple, Opts) {}
-void AArch64leTargetInfo::setDataLayout() {
- if (getTriple().isOSBinFormatMachO()) {
- if(getTriple().isArch32Bit())
- resetDataLayout("e-m:o-p:32:32-p270:32:32-p271:32:32-p272:64:64-i64:64-"
- "i128:128-n32:64-S128-Fn32",
- "_");
- else
- resetDataLayout("e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-"
- "n32:64-S128-Fn32",
- "_");
- } else
- resetDataLayout("e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-"
- "i64:64-i128:128-n32:64-S128-Fn32");
-}
-
void AArch64leTargetInfo::getTargetDefines(const LangOptions &Opts,
MacroBuilder &Builder) const {
Builder.defineMacro("__AARCH64EL__");
@@ -1661,12 +1646,6 @@ void AArch64beTargetInfo::getTargetDefines(const LangOptions &Opts,
AArch64TargetInfo::getTargetDefines(Opts, Builder);
}
-void AArch64beTargetInfo::setDataLayout() {
- assert(!getTriple().isOSBinFormatMachO());
- resetDataLayout("E-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-"
- "i64:64-i128:128-n32:64-S128-Fn32");
-}
-
WindowsARM64TargetInfo::WindowsARM64TargetInfo(const llvm::Triple &Triple,
const TargetOptions &Opts)
: WindowsTargetInfo<AArch64leTargetInfo>(Triple, Opts), Triple(Triple) {
@@ -1685,15 +1664,6 @@ WindowsARM64TargetInfo::WindowsARM64TargetInfo(const llvm::Triple &Triple,
IntPtrType = SignedLongLong;
}
-void WindowsARM64TargetInfo::setDataLayout() {
- resetDataLayout(Triple.isOSBinFormatMachO()
- ? "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:"
- "128-n32:64-S128-Fn32"
- : "e-m:w-p270:32:32-p271:32:32-p272:64:64-p:64:64-i32:32-"
- "i64:64-i128:128-n32:64-S128-Fn32",
- Triple.isOSBinFormatMachO() ? "_" : "");
-}
-
TargetInfo::BuiltinVaListKind
WindowsARM64TargetInfo::getBuiltinVaListKind() const {
return TargetInfo::CharPtrBuiltinVaList;
diff --git a/clang/lib/Basic/Targets/AArch64.h b/clang/lib/Basic/Targets/AArch64.h
index 1a7aa658e9d87..d44b66d1b124e 100644
--- a/clang/lib/Basic/Targets/AArch64.h
+++ b/clang/lib/Basic/Targets/AArch64.h
@@ -54,7 +54,6 @@ static const unsigned ARM64AddrSpaceMap[] = {
};
class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public TargetInfo {
- virtual void setDataLayout() = 0;
static const TargetInfo::GCCRegAlias GCCRegAliases[];
static const char *const GCCRegNames[];
@@ -274,9 +273,7 @@ class LLVM_LIBRARY_VISIBILITY AArch64leTargetInfo : public AArch64TargetInfo {
AArch64leTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts);
void getTargetDefines(const LangOptions &Opts,
- MacroBuilder &Builder) const override;
-private:
- void setDataLayout() override;
+ MacroBuilder &Builder) const override;
};
template <>
@@ -297,8 +294,6 @@ class LLVM_LIBRARY_VISIBILITY WindowsARM64TargetInfo
WindowsARM64TargetInfo(const llvm::Triple &Triple,
const TargetOptions &Opts);
- void setDataLayout() override;
-
BuiltinVaListKind getBuiltinVaListKind() const override;
CallingConvCheckResult checkCallingConvention(CallingConv CC) const override;
@@ -332,9 +327,6 @@ class LLVM_LIBRARY_VISIBILITY AArch64beTargetInfo : public AArch64TargetInfo {
AArch64beTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts);
void getTargetDefines(const LangOptions &Opts,
MacroBuilder &Builder) const override;
-
-private:
- void setDataLayout() override;
};
void getAppleMachOAArch64Defines(MacroBuilder &Builder, const LangOptions &Opts,
diff --git a/clang/lib/Basic/Targets/AMDGPU.cpp b/clang/lib/Basic/Targets/AMDGPU.cpp
index d4d696b8456b6..08f8370033a84 100644
--- a/clang/lib/Basic/Targets/AMDGPU.cpp
+++ b/clang/lib/Basic/Targets/AMDGPU.cpp
@@ -26,16 +26,6 @@ namespace targets {
// If you edit the description strings, make sure you update
// getPointerWidthV().
-static const char *const DataLayoutStringR600 =
- "e-m:e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
- "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1";
-
-static const char *const DataLayoutStringAMDGCN =
- "e-m:e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32"
- "-p7:160:256:256:32-p8:128:128:128:48-p9:192:256:256:32-i64:64-"
- "v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-"
- "v2048:2048-n32:64-S32-A5-G1-ni:7:8:9";
-
const LangASMap AMDGPUTargetInfo::AMDGPUDefIsGenMap = {
llvm::AMDGPUAS::FLAT_ADDRESS, // Default
llvm::AMDGPUAS::GLOBAL_ADDRESS, // opencl_global
@@ -237,8 +227,7 @@ AMDGPUTargetInfo::AMDGPUTargetInfo(const llvm::Triple &Triple,
GPUFeatures(isAMDGCN(Triple) ?
llvm::AMDGPU::getArchAttrAMDGCN(GPUKind) :
llvm::AMDGPU::getArchAttrR600(GPUKind)) {
- resetDataLayout(isAMDGCN(getTriple()) ? DataLayoutStringAMDGCN
- : DataLayoutStringR600);
+ resetDataLayout();
setAddressSpaceMap(Triple.getOS() == llvm::Triple::Mesa3D ||
!isAMDGCN(Triple));
diff --git a/clang/lib/Basic/Targets/ARC.h b/clang/lib/Basic/Targets/ARC.h
index 2b69f95591fa1..ff605def1f617 100644
--- a/clang/lib/Basic/Targets/ARC.h
+++ b/clang/lib/Basic/Targets/ARC.h
@@ -33,8 +33,7 @@ class LLVM_LIBRARY_VISIBILITY ARCTargetInfo : public TargetInfo {
PtrDiffType = SignedInt;
IntPtrType = SignedInt;
UseZeroLengthBitfieldAlignment = true;
- resetDataLayout("e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-"
- "i32:32:32-f32:32:32-i64:32-f64:32-a:0:32-n32");
+ resetDataLayout();
}
void getTargetDefines(const LangOptions &Opts,
diff --git a/clang/lib/Basic/Targets/ARM.cpp b/clang/lib/Basic/Targets/ARM.cpp
index 394b50b9ee222..f21e9ebbc903a 100644
--- a/clang/lib/Basic/Targets/ARM.cpp
+++ b/clang/lib/Basic/Targets/ARM.cpp
@@ -39,36 +39,12 @@ void ARMTargetInfo::setABIAAPCS() {
ZeroLengthBitfieldBoundary = 0;
- // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
- // so set preferred for small types to 32.
- if (T.isOSBinFormatMachO()) {
- resetDataLayout(BigEndian
- ? "E-m:o-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
- : "e-m:o-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64",
- "_");
- } else if (T.isOSWindows()) {
- assert(!BigEndian && "Windows on ARM does not support big endian");
- resetDataLayout("e"
- "-m:w"
- "-p:32:32"
- "-Fi8"
- "-i64:64"
- "-v128:64:128"
- "-a:0:32"
- "-n32"
- "-S64");
- } else {
- resetDataLayout(BigEndian
- ? "E-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
- : "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64");
- }
+ resetDataLayout();
// FIXME: Enumerated types are variable width in straight AAPCS.
}
void ARMTargetInfo::setABIAPCS(bool IsAAPCS16) {
- const llvm::Triple &T = getTriple();
-
IsAAPCS = false;
if (IsAAPCS16)
@@ -89,20 +65,7 @@ void ARMTargetInfo::setABIAPCS(bool IsAAPCS16) {
/// gcc.
ZeroLengthBitfieldBoundary = 32;
- if (T.isOSBinFormatMachO() && IsAAPCS16) {
- assert(!BigEndian && "AAPCS16 does not support big-endian");
- resetDataLayout("e-m:o-p:32:32-Fi8-i64:64-a:0:32-n32-S128", "_");
- } else if (T.isOSBinFormatMachO())
- resetDataLayout(
- BigEndian
- ? "E-m:o-p:32:32-Fi8-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
- : "e-m:o-p:32:32-Fi8-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32",
- "_");
- else
- resetDataLayout(
- BigEndian
- ? "E-m:e-p:32:32-Fi8-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
- : "e-m:e-p:32:32-Fi8-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32");
+ resetDataLayout();
// FIXME: Override "preferred align" for double and long long.
}
@@ -1545,7 +1508,7 @@ CygwinARMTargetInfo::CygwinARMTargetInfo(const llvm::Triple &Triple,
this->WCharType = TargetInfo::UnsignedShort;
TLSSupported = false;
DoubleAlign = LongLongAlign = 64;
- resetDataLayout("e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64");
+ resetDataLayout();
}
void CygwinARMTargetInfo::getTargetDefines(const LangOptions &Opts,
diff --git a/clang/lib/Basic/Targets/AVR.h b/clang/lib/Basic/Targets/AVR.h
index b666778659603..927a63d052d5d 100644
--- a/clang/lib/Basic/Targets/AVR.h
+++ b/clang/lib/Basic/Targets/AVR.h
@@ -57,7 +57,7 @@ class LLVM_LIBRARY_VISIBILITY AVRTargetInfo : public TargetInfo {
Int16Type = SignedInt;
Char32Type = UnsignedLong;
SigAtomicType = SignedChar;
- resetDataLayout("e-P1-p:16:8-i8:8-i16:8-i32:8-i64:8-f32:8-f64:8-n8:16-a:8");
+ resetDataLayout();
}
void getTargetDefines(const LangOptions &Opts,
diff --git a/clang/lib/Basic/Targets/BPF.h b/clang/lib/Basic/Targets/BPF.h
index d9e5cf4d8a92f..47bf1f94177d1 100644
--- a/clang/lib/Basic/Targets/BPF.h
+++ b/clang/lib/Basic/Targets/BPF.h
@@ -34,11 +34,7 @@ class LLVM_LIBRARY_VISIBILITY BPFTargetInfo : public TargetInfo {
IntMaxType = SignedLong;
Int64Type = SignedLong;
RegParmMax = 5;
- if (Triple.getArch() == llvm::Triple::bpfeb) {
- resetDataLayout("E-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
- } else {
- resetDataLayout("e-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
- }
+ resetDataLayout();
MaxAtomicPromoteWidth = 64;
MaxAtomicInlineWidth = 64;
TLSSupported = false;
diff --git a/clang/lib/Basic/Targets/CSKY.h b/clang/lib/Basic/Targets/CSKY.h
index ddfbe4794daad..fbdec1ea6d92d 100644
--- a/clang/lib/Basic/Targets/CSKY.h
+++ b/clang/lib/Basic/Targets/CSKY.h
@@ -52,10 +52,8 @@ class LLVM_LIBRARY_VISIBILITY CSKYTargetInfo : public TargetInfo {
UseZeroLengthBitfieldAlignment = true;
MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
- resetDataLayout("e-m:e-S32-p:32:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-"
- "v64:32:32-v128:32:32-a:0:32-Fi32-n32");
-
setABI("abiv2");
+ resetDataLayout();
}
StringRef getABI() const override { return ABI; }
diff --git a/clang/lib/Basic/Targets/DirectX.h b/clang/lib/Basic/Targets/DirectX.h
index a21a593365773..1f77e4fc2a982 100644
--- a/clang/lib/Basic/Targets/DirectX.h
+++ b/clang/lib/Basic/Targets/DirectX.h
@@ -64,11 +64,7 @@ class LLVM_LIBRARY_VISIBILITY DirectXTargetInfo : public TargetInfo {
NoAsmVariants = true;
PlatformMinVersion = Triple.getOSVersion();
PlatformName = llvm::Triple::getOSTypeName(Triple.getOS());
- // TODO: We need to align vectors on the element size generally, but for now
- // we hard code this for 3-element 32- and 64-bit vectors as a workaround.
- // See https://github.com/llvm/llvm-project/issues/123968
- resetDataLayout("e-m:e-p:32:32-i1:32-i8:8-i16:16-i32:32-i64:64-f16:16-f32:"
- "32-f64:64-n8:16:32:64-v48:16:16-v96:32:32-v192:64:64");
+ resetDataLayout();
TheCXXABI.set(TargetCXXABI::GenericItanium);
}
bool useFP16ConversionIntrinsics() const override { return false; }
diff --git a/clang/lib/Basic/Targets/Hexagon.h b/clang/lib/Basic/Targets/Hexagon.h
index 53c348a3246f9..21da0fc4cbdd0 100644
--- a/clang/lib/Basic/Targets/Hexagon.h
+++ b/clang/lib/Basic/Targets/Hexagon.h
@@ -38,13 +38,7 @@ class LLVM_LIBRARY_VISIBILITY HexagonTargetInfo : public TargetInfo {
public:
HexagonTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
: TargetInfo(Triple) {
- // Specify the vector alignment explicitly. For v512x1, the calculated
- // alignment would be 512*alignment(i1), which is 512 bytes, instead of
- // the required minimum of 64 bytes.
- resetDataLayout(
- "e-m:e-p:32:32:32-a:0-n16:32-"
- "i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-"
- "v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048");
+ resetDataLayout();
SizeType = UnsignedInt;
PtrDiffType = SignedInt;
IntPtrType = SignedInt;
diff --git a/clang/lib/Basic/Targets/Lanai.h b/clang/lib/Basic/Targets/Lanai.h
index e32ef9d7d40da..a49c425965445 100644
--- a/clang/lib/Basic/Targets/Lanai.h
+++ b/clang/lib/Basic/Targets/Lanai.h
@@ -35,15 +35,7 @@ class LLVM_LIBRARY_VISIBILITY LanaiTargetInfo : public TargetInfo {
public:
LanaiTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
: TargetInfo(Triple) {
- // Description string has to be kept in sync with backend.
- resetDataLayout("E" // Big endian
- "-m:e" // ELF name manging
- "-p:32:32" // 32 bit pointers, 32 bit aligned
- "-i64:64" // 64 bit integers, 64 bit aligned
- "-a:0:32" // 32 bit alignment of objects of aggregate type
- "-n32" // 32 bit native integer width
- "-S64" // 64 bit natural stack alignment
- );
+ resetDataLayout();
// Setting RegParmMax equal to what mregparm was set to in the old
// toolchain
diff --git a/clang/lib/Basic/Targets/LoongArch.h b/clang/lib/Basic/Targets/LoongArch.h
index 88dc433924d6c..31afd3eed96f9 100644
--- a/clang/lib/Basic/Targets/LoongArch.h
+++ b/clang/lib/Basic/Targets/LoongArch.h
@@ -133,9 +133,9 @@ class LLVM_LIBRARY_VISIBILITY LoongArch32TargetInfo
IntPtrType = SignedInt;
PtrDiffType = SignedInt;
SizeType = UnsignedInt;
- resetDataLayout("e-m:e-p:32:32-i64:64-n32-S128");
// TODO: select appropriate ABI.
setABI("ilp32d");
+ resetDataLayout();
}
bool setABI(const std::string &Name) override {
@@ -158,9 +158,9 @@ class LLVM_LIBRARY_VISIBILITY LoongArch64TargetInfo
LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
IntMaxType = Int64Type = SignedLong;
HasUnalignedAccess = true;
- resetDataLayout("e-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
// TODO: select appropriate ABI.
setABI("lp64d");
+ resetDataLayout();
}
bool setABI(const std::string &Name) override {
diff --git a/clang/lib/Basic/Targets/M68k.cpp b/clang/lib/Basic/Targets/M68k.cpp
index 3988cb5294560..293cbe5ce9272 100644
--- a/clang/lib/Basic/Targets/M68k.cpp
+++ b/clang/lib/Basic/Targets/M68k.cpp
@@ -27,31 +27,7 @@ namespace targets {
M68kTargetInfo::M68kTargetInfo(const llvm::Triple &Triple,
const TargetOptions &Opts)
: TargetInfo(Triple), TargetOpts(Opts) {
-
- std::string Layout;
-
- // M68k is Big Endian
- Layout += "E";
-
- // FIXME how to wire it with the used object format?
- Layout += "-m:e";
-
- // M68k pointers are always 32 bit wide even for 16-bit CPUs
- Layout += "-p:32:16:32";
-
- // M68k integer data types
- Layout += "-i8:8:8-i16:16:16-i32:16:32";
-
- // FIXME no floats at the moment
-
- // The registers can hold 8, 16, 32 bits
- Layout += "-n8:16:32";
-
- // 16 bit alignment for both stack and aggregate
- // in order to conform to ABI used by GCC
- Layout += "-a:0:16-S16";
-
- resetDataLayout(Layout);
+ resetDataLayout();
SizeType = UnsignedInt;
PtrDiffType = SignedInt;
diff --git a/clang/lib/Basic/Targets/MSP430.h b/clang/lib/Basic/Targets/MSP430.h
index d7d05f992f4f6..96a243ef70fae 100644
--- a/clang/lib/Basic/Targets/MSP430.h
+++ b/clang/lib/Basic/Targets/MSP430.h
@@ -45,7 +45,7 @@ class LLVM_LIBRARY_VISIBILITY MSP430TargetInfo : public TargetInfo {
IntPtrType = SignedInt;
PtrDiffType = SignedInt;
SigAtomicType = SignedLong;
- resetDataLayout("e-m:e-p:16:16-i32:16-i64:16-f32:16-f64:16-a:8-n8:16-S16");
+ resetDataLayout();
}
void getTargetDefines(const LangOptions &Opts,
MacroBuilder &Builder) const override;
diff --git a/clang/lib/Basic/Targets/Mips.h b/clang/lib/Basic/Targets/Mips.h
index 930271cee73ff..4c09390c3c6d5 100644
--- a/clang/lib/Basic/Targets/Mips.h
+++ b/clang/lib/Basic/Targets/Mips.h
@@ -23,24 +23,6 @@ namespace clang {
namespace targets {
class LLVM_LIBRARY_VISIBILITY MipsTargetInfo : public TargetInfo {
- void setDataLayout() {
- StringRef Layout;
-
- if (ABI == "o32")
- Layout = "m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64";
- else if (ABI == "n32")
- Layout = "m:e-p:32:32-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128";
- else if (ABI == "n64")
- Layout = "m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128";
- else
- llvm_unreachable("Invalid ABI");
-
- if (BigEndian)
- resetDataLayout(("E-" + Layout).str());
- else
- resetDataLayout(("e-" + Layout).str());
- }
-
std::string CPU;
bool IsMips16;
bool IsMicromips;
@@ -392,7 +374,7 @@ class LLVM_LIBRARY_VISIBILITY MipsTargetInfo : public TargetInfo {
Features.push_back("+fp64");
}
- setDataLayout();
+ resetDataLayout();
return true;
}
diff --git a/clang/lib/Basic/Targets/NVPTX.cpp b/clang/lib/Basic/Targets/NVPTX.cpp
index ec4e40b0db6eb..cf95b07758d95 100644
--- a/clang/lib/Basic/Targets/NVPTX.cpp
+++ b/clang/lib/Basic/Targets/NVPTX.cpp
@@ -68,16 +68,9 @@ NVPTXTargetInfo::NVPTXTargetInfo(const llvm::Triple &Triple,
HasFastHalfType = true;
HasFloat16 = true;
- if (TargetPointerWidth == 32)
- resetDataLayout("e-p:32:32-p6:32:32-p7:32:32-i64:64-i128:128-i256:256-v16:"
- "16-v32:32-n16:32:64");
- else if (Opts.NVPTXUseShortPointers)
- resetDataLayout("e-p3:32:32-p4:32:32-p5:32:32-p6:32:32-p7:32:32-i64:64-"
- "i128:128-i256:256-v16:"
- "16-v32:32-n16:32:64");
- else
- resetDataLayout(
- "e-p6:32:32-i64...
[truncated]
|
Member
|
@llvm/pr-subscribers-backend-msp430 Author: Nikita Popov (nikic) ChangesThis switches clang to use the data layouts from TargetParser, instead of maintaining its own copy of data layouts, which are required to match the backend data layouts. For now I've kept explicit calls to resetDataLayout(), just with the argument implied by the triple and ABI. Ideally this would happen automatically, but the way these classes are initialized currently doesn't offer a great place to do this. Previously resetDataLayout() also set the UserLabelPrefix. I've separated this out, with a reasonable default so that most targets don't need to worry about it. I've kept the explicit data layouts for TCE and SPIR (without the V). These seem to not correspond to real LLVM targets. I've also fixed the XCore data layout in TargetParser, which was incorrectly set to the same one as Xtensa. It was previously unused. Patch is 39.11 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/171135.diff 31 Files Affected:
diff --git a/clang/include/clang/Basic/TargetInfo.h b/clang/include/clang/Basic/TargetInfo.h
index 1f5932225d31e..885325c3379e3 100644
--- a/clang/include/clang/Basic/TargetInfo.h
+++ b/clang/include/clang/Basic/TargetInfo.h
@@ -296,9 +296,11 @@ class TargetInfo : public TransferrableTargetInfo,
// TargetInfo Constructor. Default initializes all fields.
TargetInfo(const llvm::Triple &T);
- // UserLabelPrefix must match DL's getGlobalPrefix() when interpreted
- // as a DataLayout object.
- void resetDataLayout(StringRef DL, const char *UserLabelPrefix = "");
+ /// Set the data layout to the given string.
+ void resetDataLayout(StringRef DL);
+
+ /// Set the data layout based on current triple and ABI.
+ void resetDataLayout();
// Target features that are read-only and should not be disabled/enabled
// by command line options. Such features are for emitting predefined
diff --git a/clang/lib/Basic/TargetInfo.cpp b/clang/lib/Basic/TargetInfo.cpp
index c0ed900ebd45c..7e82213be4479 100644
--- a/clang/lib/Basic/TargetInfo.cpp
+++ b/clang/lib/Basic/TargetInfo.cpp
@@ -156,7 +156,7 @@ TargetInfo::TargetInfo(const llvm::Triple &T) : Triple(T) {
Float128Format = &llvm::APFloat::IEEEquad();
Ibm128Format = &llvm::APFloat::PPCDoubleDouble();
MCountName = "mcount";
- UserLabelPrefix = "_";
+ UserLabelPrefix = Triple.isOSBinFormatMachO() ? "_" : "";
RegParmMax = 0;
SSERegParmMax = 0;
HasAlignMac68kSupport = false;
@@ -196,9 +196,10 @@ TargetInfo::TargetInfo(const llvm::Triple &T) : Triple(T) {
// Out of line virtual dtor for TargetInfo.
TargetInfo::~TargetInfo() {}
-void TargetInfo::resetDataLayout(StringRef DL, const char *ULP) {
- DataLayoutString = DL.str();
- UserLabelPrefix = ULP;
+void TargetInfo::resetDataLayout(StringRef DL) { DataLayoutString = DL.str(); }
+
+void TargetInfo::resetDataLayout() {
+ DataLayoutString = Triple.computeDataLayout(getABI());
}
bool
diff --git a/clang/lib/Basic/Targets/AArch64.cpp b/clang/lib/Basic/Targets/AArch64.cpp
index d7f36c0f9b79a..476fa829bef61 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -1212,7 +1212,7 @@ bool AArch64TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
HasD128 = false;
}
- setDataLayout();
+ resetDataLayout();
if (HasNoFP) {
FPU &= ~FPUMode;
@@ -1628,21 +1628,6 @@ AArch64leTargetInfo::AArch64leTargetInfo(const llvm::Triple &Triple,
const TargetOptions &Opts)
: AArch64TargetInfo(Triple, Opts) {}
-void AArch64leTargetInfo::setDataLayout() {
- if (getTriple().isOSBinFormatMachO()) {
- if(getTriple().isArch32Bit())
- resetDataLayout("e-m:o-p:32:32-p270:32:32-p271:32:32-p272:64:64-i64:64-"
- "i128:128-n32:64-S128-Fn32",
- "_");
- else
- resetDataLayout("e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-"
- "n32:64-S128-Fn32",
- "_");
- } else
- resetDataLayout("e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-"
- "i64:64-i128:128-n32:64-S128-Fn32");
-}
-
void AArch64leTargetInfo::getTargetDefines(const LangOptions &Opts,
MacroBuilder &Builder) const {
Builder.defineMacro("__AARCH64EL__");
@@ -1661,12 +1646,6 @@ void AArch64beTargetInfo::getTargetDefines(const LangOptions &Opts,
AArch64TargetInfo::getTargetDefines(Opts, Builder);
}
-void AArch64beTargetInfo::setDataLayout() {
- assert(!getTriple().isOSBinFormatMachO());
- resetDataLayout("E-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-"
- "i64:64-i128:128-n32:64-S128-Fn32");
-}
-
WindowsARM64TargetInfo::WindowsARM64TargetInfo(const llvm::Triple &Triple,
const TargetOptions &Opts)
: WindowsTargetInfo<AArch64leTargetInfo>(Triple, Opts), Triple(Triple) {
@@ -1685,15 +1664,6 @@ WindowsARM64TargetInfo::WindowsARM64TargetInfo(const llvm::Triple &Triple,
IntPtrType = SignedLongLong;
}
-void WindowsARM64TargetInfo::setDataLayout() {
- resetDataLayout(Triple.isOSBinFormatMachO()
- ? "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:"
- "128-n32:64-S128-Fn32"
- : "e-m:w-p270:32:32-p271:32:32-p272:64:64-p:64:64-i32:32-"
- "i64:64-i128:128-n32:64-S128-Fn32",
- Triple.isOSBinFormatMachO() ? "_" : "");
-}
-
TargetInfo::BuiltinVaListKind
WindowsARM64TargetInfo::getBuiltinVaListKind() const {
return TargetInfo::CharPtrBuiltinVaList;
diff --git a/clang/lib/Basic/Targets/AArch64.h b/clang/lib/Basic/Targets/AArch64.h
index 1a7aa658e9d87..d44b66d1b124e 100644
--- a/clang/lib/Basic/Targets/AArch64.h
+++ b/clang/lib/Basic/Targets/AArch64.h
@@ -54,7 +54,6 @@ static const unsigned ARM64AddrSpaceMap[] = {
};
class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public TargetInfo {
- virtual void setDataLayout() = 0;
static const TargetInfo::GCCRegAlias GCCRegAliases[];
static const char *const GCCRegNames[];
@@ -274,9 +273,7 @@ class LLVM_LIBRARY_VISIBILITY AArch64leTargetInfo : public AArch64TargetInfo {
AArch64leTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts);
void getTargetDefines(const LangOptions &Opts,
- MacroBuilder &Builder) const override;
-private:
- void setDataLayout() override;
+ MacroBuilder &Builder) const override;
};
template <>
@@ -297,8 +294,6 @@ class LLVM_LIBRARY_VISIBILITY WindowsARM64TargetInfo
WindowsARM64TargetInfo(const llvm::Triple &Triple,
const TargetOptions &Opts);
- void setDataLayout() override;
-
BuiltinVaListKind getBuiltinVaListKind() const override;
CallingConvCheckResult checkCallingConvention(CallingConv CC) const override;
@@ -332,9 +327,6 @@ class LLVM_LIBRARY_VISIBILITY AArch64beTargetInfo : public AArch64TargetInfo {
AArch64beTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts);
void getTargetDefines(const LangOptions &Opts,
MacroBuilder &Builder) const override;
-
-private:
- void setDataLayout() override;
};
void getAppleMachOAArch64Defines(MacroBuilder &Builder, const LangOptions &Opts,
diff --git a/clang/lib/Basic/Targets/AMDGPU.cpp b/clang/lib/Basic/Targets/AMDGPU.cpp
index d4d696b8456b6..08f8370033a84 100644
--- a/clang/lib/Basic/Targets/AMDGPU.cpp
+++ b/clang/lib/Basic/Targets/AMDGPU.cpp
@@ -26,16 +26,6 @@ namespace targets {
// If you edit the description strings, make sure you update
// getPointerWidthV().
-static const char *const DataLayoutStringR600 =
- "e-m:e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
- "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1";
-
-static const char *const DataLayoutStringAMDGCN =
- "e-m:e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32"
- "-p7:160:256:256:32-p8:128:128:128:48-p9:192:256:256:32-i64:64-"
- "v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-"
- "v2048:2048-n32:64-S32-A5-G1-ni:7:8:9";
-
const LangASMap AMDGPUTargetInfo::AMDGPUDefIsGenMap = {
llvm::AMDGPUAS::FLAT_ADDRESS, // Default
llvm::AMDGPUAS::GLOBAL_ADDRESS, // opencl_global
@@ -237,8 +227,7 @@ AMDGPUTargetInfo::AMDGPUTargetInfo(const llvm::Triple &Triple,
GPUFeatures(isAMDGCN(Triple) ?
llvm::AMDGPU::getArchAttrAMDGCN(GPUKind) :
llvm::AMDGPU::getArchAttrR600(GPUKind)) {
- resetDataLayout(isAMDGCN(getTriple()) ? DataLayoutStringAMDGCN
- : DataLayoutStringR600);
+ resetDataLayout();
setAddressSpaceMap(Triple.getOS() == llvm::Triple::Mesa3D ||
!isAMDGCN(Triple));
diff --git a/clang/lib/Basic/Targets/ARC.h b/clang/lib/Basic/Targets/ARC.h
index 2b69f95591fa1..ff605def1f617 100644
--- a/clang/lib/Basic/Targets/ARC.h
+++ b/clang/lib/Basic/Targets/ARC.h
@@ -33,8 +33,7 @@ class LLVM_LIBRARY_VISIBILITY ARCTargetInfo : public TargetInfo {
PtrDiffType = SignedInt;
IntPtrType = SignedInt;
UseZeroLengthBitfieldAlignment = true;
- resetDataLayout("e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-"
- "i32:32:32-f32:32:32-i64:32-f64:32-a:0:32-n32");
+ resetDataLayout();
}
void getTargetDefines(const LangOptions &Opts,
diff --git a/clang/lib/Basic/Targets/ARM.cpp b/clang/lib/Basic/Targets/ARM.cpp
index 394b50b9ee222..f21e9ebbc903a 100644
--- a/clang/lib/Basic/Targets/ARM.cpp
+++ b/clang/lib/Basic/Targets/ARM.cpp
@@ -39,36 +39,12 @@ void ARMTargetInfo::setABIAAPCS() {
ZeroLengthBitfieldBoundary = 0;
- // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
- // so set preferred for small types to 32.
- if (T.isOSBinFormatMachO()) {
- resetDataLayout(BigEndian
- ? "E-m:o-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
- : "e-m:o-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64",
- "_");
- } else if (T.isOSWindows()) {
- assert(!BigEndian && "Windows on ARM does not support big endian");
- resetDataLayout("e"
- "-m:w"
- "-p:32:32"
- "-Fi8"
- "-i64:64"
- "-v128:64:128"
- "-a:0:32"
- "-n32"
- "-S64");
- } else {
- resetDataLayout(BigEndian
- ? "E-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
- : "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64");
- }
+ resetDataLayout();
// FIXME: Enumerated types are variable width in straight AAPCS.
}
void ARMTargetInfo::setABIAPCS(bool IsAAPCS16) {
- const llvm::Triple &T = getTriple();
-
IsAAPCS = false;
if (IsAAPCS16)
@@ -89,20 +65,7 @@ void ARMTargetInfo::setABIAPCS(bool IsAAPCS16) {
/// gcc.
ZeroLengthBitfieldBoundary = 32;
- if (T.isOSBinFormatMachO() && IsAAPCS16) {
- assert(!BigEndian && "AAPCS16 does not support big-endian");
- resetDataLayout("e-m:o-p:32:32-Fi8-i64:64-a:0:32-n32-S128", "_");
- } else if (T.isOSBinFormatMachO())
- resetDataLayout(
- BigEndian
- ? "E-m:o-p:32:32-Fi8-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
- : "e-m:o-p:32:32-Fi8-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32",
- "_");
- else
- resetDataLayout(
- BigEndian
- ? "E-m:e-p:32:32-Fi8-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
- : "e-m:e-p:32:32-Fi8-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32");
+ resetDataLayout();
// FIXME: Override "preferred align" for double and long long.
}
@@ -1545,7 +1508,7 @@ CygwinARMTargetInfo::CygwinARMTargetInfo(const llvm::Triple &Triple,
this->WCharType = TargetInfo::UnsignedShort;
TLSSupported = false;
DoubleAlign = LongLongAlign = 64;
- resetDataLayout("e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64");
+ resetDataLayout();
}
void CygwinARMTargetInfo::getTargetDefines(const LangOptions &Opts,
diff --git a/clang/lib/Basic/Targets/AVR.h b/clang/lib/Basic/Targets/AVR.h
index b666778659603..927a63d052d5d 100644
--- a/clang/lib/Basic/Targets/AVR.h
+++ b/clang/lib/Basic/Targets/AVR.h
@@ -57,7 +57,7 @@ class LLVM_LIBRARY_VISIBILITY AVRTargetInfo : public TargetInfo {
Int16Type = SignedInt;
Char32Type = UnsignedLong;
SigAtomicType = SignedChar;
- resetDataLayout("e-P1-p:16:8-i8:8-i16:8-i32:8-i64:8-f32:8-f64:8-n8:16-a:8");
+ resetDataLayout();
}
void getTargetDefines(const LangOptions &Opts,
diff --git a/clang/lib/Basic/Targets/BPF.h b/clang/lib/Basic/Targets/BPF.h
index d9e5cf4d8a92f..47bf1f94177d1 100644
--- a/clang/lib/Basic/Targets/BPF.h
+++ b/clang/lib/Basic/Targets/BPF.h
@@ -34,11 +34,7 @@ class LLVM_LIBRARY_VISIBILITY BPFTargetInfo : public TargetInfo {
IntMaxType = SignedLong;
Int64Type = SignedLong;
RegParmMax = 5;
- if (Triple.getArch() == llvm::Triple::bpfeb) {
- resetDataLayout("E-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
- } else {
- resetDataLayout("e-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
- }
+ resetDataLayout();
MaxAtomicPromoteWidth = 64;
MaxAtomicInlineWidth = 64;
TLSSupported = false;
diff --git a/clang/lib/Basic/Targets/CSKY.h b/clang/lib/Basic/Targets/CSKY.h
index ddfbe4794daad..fbdec1ea6d92d 100644
--- a/clang/lib/Basic/Targets/CSKY.h
+++ b/clang/lib/Basic/Targets/CSKY.h
@@ -52,10 +52,8 @@ class LLVM_LIBRARY_VISIBILITY CSKYTargetInfo : public TargetInfo {
UseZeroLengthBitfieldAlignment = true;
MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
- resetDataLayout("e-m:e-S32-p:32:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-"
- "v64:32:32-v128:32:32-a:0:32-Fi32-n32");
-
setABI("abiv2");
+ resetDataLayout();
}
StringRef getABI() const override { return ABI; }
diff --git a/clang/lib/Basic/Targets/DirectX.h b/clang/lib/Basic/Targets/DirectX.h
index a21a593365773..1f77e4fc2a982 100644
--- a/clang/lib/Basic/Targets/DirectX.h
+++ b/clang/lib/Basic/Targets/DirectX.h
@@ -64,11 +64,7 @@ class LLVM_LIBRARY_VISIBILITY DirectXTargetInfo : public TargetInfo {
NoAsmVariants = true;
PlatformMinVersion = Triple.getOSVersion();
PlatformName = llvm::Triple::getOSTypeName(Triple.getOS());
- // TODO: We need to align vectors on the element size generally, but for now
- // we hard code this for 3-element 32- and 64-bit vectors as a workaround.
- // See https://github.com/llvm/llvm-project/issues/123968
- resetDataLayout("e-m:e-p:32:32-i1:32-i8:8-i16:16-i32:32-i64:64-f16:16-f32:"
- "32-f64:64-n8:16:32:64-v48:16:16-v96:32:32-v192:64:64");
+ resetDataLayout();
TheCXXABI.set(TargetCXXABI::GenericItanium);
}
bool useFP16ConversionIntrinsics() const override { return false; }
diff --git a/clang/lib/Basic/Targets/Hexagon.h b/clang/lib/Basic/Targets/Hexagon.h
index 53c348a3246f9..21da0fc4cbdd0 100644
--- a/clang/lib/Basic/Targets/Hexagon.h
+++ b/clang/lib/Basic/Targets/Hexagon.h
@@ -38,13 +38,7 @@ class LLVM_LIBRARY_VISIBILITY HexagonTargetInfo : public TargetInfo {
public:
HexagonTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
: TargetInfo(Triple) {
- // Specify the vector alignment explicitly. For v512x1, the calculated
- // alignment would be 512*alignment(i1), which is 512 bytes, instead of
- // the required minimum of 64 bytes.
- resetDataLayout(
- "e-m:e-p:32:32:32-a:0-n16:32-"
- "i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-"
- "v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048");
+ resetDataLayout();
SizeType = UnsignedInt;
PtrDiffType = SignedInt;
IntPtrType = SignedInt;
diff --git a/clang/lib/Basic/Targets/Lanai.h b/clang/lib/Basic/Targets/Lanai.h
index e32ef9d7d40da..a49c425965445 100644
--- a/clang/lib/Basic/Targets/Lanai.h
+++ b/clang/lib/Basic/Targets/Lanai.h
@@ -35,15 +35,7 @@ class LLVM_LIBRARY_VISIBILITY LanaiTargetInfo : public TargetInfo {
public:
LanaiTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
: TargetInfo(Triple) {
- // Description string has to be kept in sync with backend.
- resetDataLayout("E" // Big endian
- "-m:e" // ELF name manging
- "-p:32:32" // 32 bit pointers, 32 bit aligned
- "-i64:64" // 64 bit integers, 64 bit aligned
- "-a:0:32" // 32 bit alignment of objects of aggregate type
- "-n32" // 32 bit native integer width
- "-S64" // 64 bit natural stack alignment
- );
+ resetDataLayout();
// Setting RegParmMax equal to what mregparm was set to in the old
// toolchain
diff --git a/clang/lib/Basic/Targets/LoongArch.h b/clang/lib/Basic/Targets/LoongArch.h
index 88dc433924d6c..31afd3eed96f9 100644
--- a/clang/lib/Basic/Targets/LoongArch.h
+++ b/clang/lib/Basic/Targets/LoongArch.h
@@ -133,9 +133,9 @@ class LLVM_LIBRARY_VISIBILITY LoongArch32TargetInfo
IntPtrType = SignedInt;
PtrDiffType = SignedInt;
SizeType = UnsignedInt;
- resetDataLayout("e-m:e-p:32:32-i64:64-n32-S128");
// TODO: select appropriate ABI.
setABI("ilp32d");
+ resetDataLayout();
}
bool setABI(const std::string &Name) override {
@@ -158,9 +158,9 @@ class LLVM_LIBRARY_VISIBILITY LoongArch64TargetInfo
LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
IntMaxType = Int64Type = SignedLong;
HasUnalignedAccess = true;
- resetDataLayout("e-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
// TODO: select appropriate ABI.
setABI("lp64d");
+ resetDataLayout();
}
bool setABI(const std::string &Name) override {
diff --git a/clang/lib/Basic/Targets/M68k.cpp b/clang/lib/Basic/Targets/M68k.cpp
index 3988cb5294560..293cbe5ce9272 100644
--- a/clang/lib/Basic/Targets/M68k.cpp
+++ b/clang/lib/Basic/Targets/M68k.cpp
@@ -27,31 +27,7 @@ namespace targets {
M68kTargetInfo::M68kTargetInfo(const llvm::Triple &Triple,
const TargetOptions &Opts)
: TargetInfo(Triple), TargetOpts(Opts) {
-
- std::string Layout;
-
- // M68k is Big Endian
- Layout += "E";
-
- // FIXME how to wire it with the used object format?
- Layout += "-m:e";
-
- // M68k pointers are always 32 bit wide even for 16-bit CPUs
- Layout += "-p:32:16:32";
-
- // M68k integer data types
- Layout += "-i8:8:8-i16:16:16-i32:16:32";
-
- // FIXME no floats at the moment
-
- // The registers can hold 8, 16, 32 bits
- Layout += "-n8:16:32";
-
- // 16 bit alignment for both stack and aggregate
- // in order to conform to ABI used by GCC
- Layout += "-a:0:16-S16";
-
- resetDataLayout(Layout);
+ resetDataLayout();
SizeType = UnsignedInt;
PtrDiffType = SignedInt;
diff --git a/clang/lib/Basic/Targets/MSP430.h b/clang/lib/Basic/Targets/MSP430.h
index d7d05f992f4f6..96a243ef70fae 100644
--- a/clang/lib/Basic/Targets/MSP430.h
+++ b/clang/lib/Basic/Targets/MSP430.h
@@ -45,7 +45,7 @@ class LLVM_LIBRARY_VISIBILITY MSP430TargetInfo : public TargetInfo {
IntPtrType = SignedInt;
PtrDiffType = SignedInt;
SigAtomicType = SignedLong;
- resetDataLayout("e-m:e-p:16:16-i32:16-i64:16-f32:16-f64:16-a:8-n8:16-S16");
+ resetDataLayout();
}
void getTargetDefines(const LangOptions &Opts,
MacroBuilder &Builder) const override;
diff --git a/clang/lib/Basic/Targets/Mips.h b/clang/lib/Basic/Targets/Mips.h
index 930271cee73ff..4c09390c3c6d5 100644
--- a/clang/lib/Basic/Targets/Mips.h
+++ b/clang/lib/Basic/Targets/Mips.h
@@ -23,24 +23,6 @@ namespace clang {
namespace targets {
class LLVM_LIBRARY_VISIBILITY MipsTargetInfo : public TargetInfo {
- void setDataLayout() {
- StringRef Layout;
-
- if (ABI == "o32")
- Layout = "m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64";
- else if (ABI == "n32")
- Layout = "m:e-p:32:32-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128";
- else if (ABI == "n64")
- Layout = "m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128";
- else
- llvm_unreachable("Invalid ABI");
-
- if (BigEndian)
- resetDataLayout(("E-" + Layout).str());
- else
- resetDataLayout(("e-" + Layout).str());
- }
-
std::string CPU;
bool IsMips16;
bool IsMicromips;
@@ -392,7 +374,7 @@ class LLVM_LIBRARY_VISIBILITY MipsTargetInfo : public TargetInfo {
Features.push_back("+fp64");
}
- setDataLayout();
+ resetDataLayout();
return true;
}
diff --git a/clang/lib/Basic/Targets/NVPTX.cpp b/clang/lib/Basic/Targets/NVPTX.cpp
index ec4e40b0db6eb..cf95b07758d95 100644
--- a/clang/lib/Basic/Targets/NVPTX.cpp
+++ b/clang/lib/Basic/Targets/NVPTX.cpp
@@ -68,16 +68,9 @@ NVPTXTargetInfo::NVPTXTargetInfo(const llvm::Triple &Triple,
HasFastHalfType = true;
HasFloat16 = true;
- if (TargetPointerWidth == 32)
- resetDataLayout("e-p:32:32-p6:32:32-p7:32:32-i64:64-i128:128-i256:256-v16:"
- "16-v32:32-n16:32:64");
- else if (Opts.NVPTXUseShortPointers)
- resetDataLayout("e-p3:32:32-p4:32:32-p5:32:32-p6:32:32-p7:32:32-i64:64-"
- "i128:128-i256:256-v16:"
- "16-v32:32-n16:32:64");
- else
- resetDataLayout(
- "e-p6:32:32-i64...
[truncated]
|
arsenm
approved these changes
Dec 8, 2025
| else | ||
| resetDataLayout( | ||
| "e-p6:32:32-i64:64-i128:128-i256:256-v16:16-v32:32-n16:32:64"); | ||
| // TODO: Make shortptr a proper ABI? |
Contributor
There was a problem hiding this comment.
Or just delete it, this should have been an ancient bringup flag
| case Triple::hexagon: | ||
| // Specify the vector alignment explicitly. For v512x1, the calculated | ||
| // alignment would be 512*alignment(i1), which is 512 bytes, instead of | ||
| // the required minimum of 64 bytes. |
Collaborator
There was a problem hiding this comment.
I think this comment is out-of-date; we fixed this in bdd55b2.
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This switches clang to use the data layouts from TargetParser, instead of maintaining its own copy of data layouts, which are required to match the backend data layouts.
For now I've kept explicit calls to resetDataLayout(), just with the argument implied by the triple and ABI. Ideally this would happen automatically, but the way these classes are initialized currently doesn't offer a great place to do this.
Previously resetDataLayout() also set the UserLabelPrefix. I've separated this out, with a reasonable default so that most targets don't need to worry about it.
I've kept the explicit data layouts for TCE and SPIR (without the V). These seem to not correspond to real LLVM targets.
I've also fixed the XCore data layout in TargetParser, which was incorrectly set to the same one as Xtensa. It was previously unused.