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[Matrix] Add single subscript test #503

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Merged
merged 3 commits into from
Nov 19, 2025
Merged

[Matrix] Add single subscript test #503

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ca001e1
[Matrix] Add single subscript test
farzonl Nov 13, 2025
4628e86
address pr feedback
farzonl Nov 18, 2025
6c8e9c7
Merge branch 'main' into test/issue-502
farzonl Nov 19, 2025
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70 changes: 70 additions & 0 deletions test/Basic/matrix_single_subscript_load.test
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Original file line number Diff line number Diff line change
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#--- source.hlsl
RWBuffer<int> In : register(u0);
RWBuffer<int> Out : register(u1);

[numthreads(1,1,1)]
void main() {
int4x4 A = int4x4(In[0], In[1], In[2], In[3],
In[4], In[5], In[6], In[7],
In[8], In[9], In[10], In[11],
In[12], In[13], In[14], In[15]);

for (int i = 0; i < 4; i++) {
int4 B;
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@alsepkow alsepkow Nov 14, 2025

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very minor nit, but a for loop for 4 assignments with two of them be 'special' made me look at this for a moment longer.
4 explicit assignment statements might be cleaner.

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@farzonl farzonl Nov 18, 2025

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its going to be much more than 4 explicit asignments because its 16 asignments to fill up Out[i*4 + j].

if (i % 2 == 0)
B = A[i];
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@tex3d tex3d Nov 14, 2025

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Just a comment, not a request for change:

These subscript accesses look dynamic, but these loops are likely to be unrolled, either before IR (in DXC, Clang, etc.) or after (in a driver compiler). That unrolling would make all accesses static, even eliminating the intermediate local variables to copy values directly from static indices of In to static indices of Out. That's a fine path to test, but this might not test other important dynamic indexing code paths, if desired.

I guess this gets at the fuzzy purpose issue with the offload-test-suite. This seems fine to test this scenario end-to-end, whatever path it may take through optimizations, and maybe that's all that's desired for this test.

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@farzonl farzonl Nov 18, 2025 •
edited
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I was trying to use uint GI : SV_GroupIndex for the input to main because I thought someone might mention that. But I could not get the persistance I needed to properly fill the out buffer.

In anycase the matrix execution tests are like you said more about confirming a matrix frontend features behave the same as they would on DXC and thus a little bit different than some of the other behaviors being tested in the offload test suite like intrinsic tests. In my case its more about layout and access of data which should be preserved regardless of optimization passes.

else if (i % 3 == 0)
B = A[i].bagr;
else // i == 1
B.agrb = A[i]; // equivalent: B = A[1].bgar

for (int j = 0; j < 4; j++) {
Out[i*4 + j] = B[j];
}
}
}
//--- pipeline.yaml

---
Shaders:
- Stage: Compute
Entry: main
DispatchSize: [1, 1, 1]
Buffers:
- Name: In
Format: Int32
Data: [ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]
- Name: Out
Format: Int32
FillSize: 64
- Name: ExpectedOut
Format: Int32
Data: [ 1, 2, 3, 4, 7, 6, 8, 5, 9, 10, 11, 12, 15, 16, 14, 13 ]
Results:
- Result: Out
Rule: BufferExact
Actual: Out
Expected: ExpectedOut
DescriptorSets:
- Resources:
- Name: In
Kind: RWBuffer
DirectXBinding:
Register: 0
Space: 0
VulkanBinding:
Binding: 0
- Name: Out
Kind: RWBuffer
DirectXBinding:
Register: 1
Space: 0
VulkanBinding:
Binding: 1
...
#--- end

# XFAIL: Clang
# RUN: split-file %s %t
# RUN: %dxc_target -T cs_6_0 -Fo %t.o %t/source.hlsl
# RUN: %offloader %t/pipeline.yaml %t.o
71 changes: 71 additions & 0 deletions test/Basic/matrix_single_subscript_store.test
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Original file line number Diff line number Diff line change
@@ -0,0 +1,71 @@
#--- source.hlsl
RWBuffer<int> In : register(u0);
RWBuffer<int> Out : register(u1);

[numthreads(1,1,1)]
void main() {
int4 vec = int4(In[0], In[1], In[2], In[3]);

int4x4 A;
for(int i = 0; i < 4; i++) {
if(i % 2 == 0)
A[i].rbag = vec;
// A[3] is exactly In Buffer
else if(i % 3 == 0)
A[i] = vec;
// A[1] is reverse In Buffer
else
A[i] = vec.bagr;
}
const uint COLS = 4;
for(int i = 0; i < 16; i++) {
uint row = i / COLS;
uint col = i % COLS;
Out[i] = A[row][col];
}
}
//--- pipeline.yaml

---
Shaders:
- Stage: Compute
Entry: main
DispatchSize: [1, 1, 1]
Buffers:
- Name: In
Format: Int32
Data: [1, 2, 3, 4]
- Name: Out
Format: Int32
FillSize: 64
- Name: ExpectedOut
Format: Int32
Data: [ 1, 4, 2, 3, 3, 4, 2, 1, 1, 4, 2, 3, 1, 2, 3, 4 ]
Results:
- Result: Out
Rule: BufferExact
Actual: Out
Expected: ExpectedOut
DescriptorSets:
- Resources:
- Name: In
Kind: RWBuffer
DirectXBinding:
Register: 0
Space: 0
VulkanBinding:
Binding: 0
- Name: Out
Kind: RWBuffer
DirectXBinding:
Register: 1
Space: 0
VulkanBinding:
Binding: 1
...
#--- end

# XFAIL: Clang
# RUN: split-file %s %t
# RUN: %dxc_target -T cs_6_0 -Fo %t.o %t/source.hlsl
# RUN: %offloader %t/pipeline.yaml %t.o
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