Technology mapper and technology library generation

experiments/mapper.cpp

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+/* mockturtle: C++ logic network library
+ * Copyright (C) 2018-2021  EPFL
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <string>
+#include <vector>
+
+#include <fmt/format.h>
+#include <lorina/aiger.hpp>
+#include <lorina/genlib.hpp>
+#include <mockturtle/utils/tech_library.hpp>
+#include <mockturtle/algorithms/mapper.hpp>
+#include <mockturtle/algorithms/node_resynthesis.hpp>
+#include <mockturtle/algorithms/node_resynthesis/mig_npn.hpp>
+#include <mockturtle/io/aiger_reader.hpp>
+#include <mockturtle/io/genlib_reader.hpp>
+#include <mockturtle/networks/aig.hpp>
+#include <mockturtle/networks/klut.hpp>
+#include <mockturtle/views/depth_view.hpp>
+
+
+#include <experiments.hpp>
+
+std::string const mcnc_library =  "GATE   inv1    1 O=!a;           PIN * INV 1 999 0.9 0.3 0.9 0.3\n"
+                                  "GATE   inv2    2 O=!a;           PIN * INV 2 999 1.0 0.1 1.0 0.1\n"
+                                  "GATE   inv3    3 O=!a;           PIN * INV 3 999 1.1 0.09 1.1 0.09\n"
+                                  "GATE   inv4    4 O=!a;           PIN * INV 4 999 1.2 0.07 1.2 0.07\n"
+                                  "GATE   nand2   2 O=!(ab);        PIN * INV 1 999 1.0 0.2 1.0 0.2\n"
+                                  "GATE   nand3   3 O=!(abc);	      PIN * INV 1 999 1.1 0.3 1.1 0.3\n"
+                                  "GATE   nand4   4 O=!(abcd);      PIN * INV 1 999 1.4 0.4 1.4 0.4\n"
+                                  "GATE   nor2    2 O=!{ab};        PIN * INV 1 999 1.4 0.5 1.4 0.5\n"
+                                  "GATE   nor3    3 O=!{abc};       PIN * INV 1 999 2.4 0.7 2.4 0.7\n"
+                                  "GATE   nor4    4 O=!{abcd};      PIN * INV 1 999 3.8 1.0 3.8 1.0\n"
+                                  "GATE   and2    3 O=(ab);         PIN * NONINV 1 999 1.9 0.3 1.9 0.3\n"
+                                  "GATE   or2     3 O={ab};         PIN * NONINV 1 999 2.4 0.3 2.4 0.3\n"
+                                  "GATE   xor2a   5 O=[ab];         PIN * UNKNOWN 2 999 1.9 0.5 1.9 0.5\n"
+                                  "#GATE  xor2b   5 O=[ab];         PIN * UNKNOWN 2 999 1.9 0.5 1.9 0.5\n"
+                                  "GATE   xnor2a  5 O=![ab];        PIN * UNKNOWN 2 999 2.1 0.5 2.1 0.5\n"
+                                  "#GATE  xnor2b  5 O=![ab];        PIN * UNKNOWN 2 999 2.1 0.5 2.1 0.5\n"
+                                  "GATE   aoi21   3 O=!{(ab)c};     PIN * INV 1 999 1.6 0.4 1.6 0.4\n"
+                                  "GATE   aoi22   4 O=!{(ab)(cd)};  PIN * INV 1 999 2.0 0.4 2.0 0.4\n"
+                                  "GATE   oai21   3 O=!({ab}c);     PIN * INV 1 999 1.6 0.4 1.6 0.4\n"
+                                  "GATE   oai22   4 O=!({ab}{cd});  PIN * INV 1 999 2.0 0.4 2.0 0.4\n"
+                                  "GATE   buf     2 O=a;            PIN * NONINV 1 999 1.0 0.0 1.0 0.0\n"
+                                  "GATE   zero    0 O=0;\n"
+                                  "GATE   one     0 O=1;";
+
+int main()
+{
+  using namespace experiments;
+  using namespace mockturtle;
+
+  experiment<std::string, uint32_t, double, uint32_t, float, float, bool> exp( "mapper", "benchmark", "size", "area_after", "depth", "delay_after", "runtime", "equivalent" );
+
+  fmt::print( "[i] processing technology library\n" );
+
+  std::vector<gate> gates;
+
+  std::istringstream in( mcnc_library );
+  lorina::read_genlib( in, genlib_reader( gates ) );
+
+  tech_library_params tps;
+  tech_library<5> lib( gates, tps );
+
+  for ( auto const& benchmark : epfl_benchmarks() )
+  {
+    fmt::print( "[i] processing {}\n", benchmark );
+    aig_network aig;
+    lorina::read_aiger( benchmark_path( benchmark ), aiger_reader( aig ) );
+
+    const uint32_t size_before = aig.num_gates();
+    const uint32_t depth_before = depth_view( aig ).depth();
+
+    map_params ps;
+    ps.cut_enumeration_ps.cut_size = 5;
+    map_stats st;
+
+    auto res = tech_map( aig, lib, ps, &st );
+
+    const auto cec = benchmark == "hyp" ? true : abc_cec( res, benchmark );
+
+    exp( benchmark, size_before, st.area, depth_before, st.delay, to_seconds( st.time_total ), cec );
+  }
+
+  exp.save();
+  exp.table();
+
+  return 0;
+}

include/mockturtle/algorithms/cut_enumeration/exact_map_cut.hpp

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+/* mockturtle: C++ logic network library
+ * Copyright (C) 2018-2021  EPFL
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*!
+  \file exact_map_cut.hpp
+  \brief Cut enumeration for mapping with exact synthesis
+
+  \author Alessandro Tempia Calvino
+*/
+
+#pragma once
+
+#include <algorithm>
+#include <cstdint>
+#include <iomanip>
+#include <iostream>
+#include <vector>
+
+#include "../cut_enumeration.hpp"
+
+namespace mockturtle
+{
+
+/*! \brief Cut implementation based on ABC's giaMf.c
+
+  See <a href="https://github.com/berkeley-abc/abc/blob/master/src/aig/gia/giaMf.c">giaMf.c</a> in ABC's repository.
+*/
+struct cut_enumeration_exact_map_cut
+{
+  uint32_t delay{ 0 };
+  float flow{ 0 };
+  uint8_t match_index{ 0 };
+  bool ignore{ false };
+};
+
+template<bool ComputeTruth>
+bool operator<( cut_type<ComputeTruth, cut_enumeration_exact_map_cut> const& c1, cut_type<ComputeTruth, cut_enumeration_exact_map_cut> const& c2 )
+{
+  constexpr auto eps{ 0.005f };
+  if ( c1->data.flow < c2->data.flow - eps )
+    return true;
+  if ( c1->data.flow > c2->data.flow + eps )
+    return false;
+  if ( c1->data.delay < c2->data.delay )
+    return true;
+  if ( c1->data.delay > c2->data.delay )
+    return false;
+  return c1.size() < c2.size();
+}
+
+template<>
+struct cut_enumeration_update_cut<cut_enumeration_exact_map_cut>
+{
+  template<typename Cut, typename NetworkCuts, typename Ntk>
+  static void apply( Cut& cut, NetworkCuts const& cuts, Ntk const& ntk, node<Ntk> const& n )
+  {
+    uint32_t delay{ 0 };
+    float flow = 1.0f;
+
+    for ( auto leaf : cut )
+    {
+      const auto& best_leaf_cut = cuts.cuts( leaf )[0];
+      delay = std::max( delay, best_leaf_cut->data.delay );
+      flow += best_leaf_cut->data.flow;
+    }
+
+    cut->data.delay = 1 + delay;
+    cut->data.flow = flow / ntk.fanout_size( n );
+  }
+};
+
+template<int MaxLeaves>
+std::ostream& operator<<( std::ostream& os, cut<MaxLeaves, cut_data<false, cut_enumeration_exact_map_cut>> const& c )
+{
+  os << "{ ";
+  std::copy( c.begin(), c.end(), std::ostream_iterator<uint32_t>( os, " " ) );
+  os << "}, D = " << std::setw( 3 ) << c->data.delay << " A = " << c->data.flow;
+  return os;
+}
+
+} // namespace mockturtle

include/mockturtle/algorithms/cut_enumeration/tech_map_cut.hpp

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+/* mockturtle: C++ logic network library
+ * Copyright (C) 2018-2021  EPFL
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*!
+  \file tech_map_cut.hpp
+  \brief Cut enumeration for technology mapping
+
+  \author Alessandro Tempia Calvino
+*/
+
+#pragma once
+
+#include <algorithm>
+#include <cstdint>
+#include <iomanip>
+#include <iostream>
+#include <vector>
+
+#include "../cut_enumeration.hpp"
+
+namespace mockturtle
+{
+
+struct cut_enumeration_tech_map_cut
+{
+  uint32_t delay{ 0 };
+  float flow{ 0 };
+  uint8_t match_index{ 0 };
+  bool ignore{ false };
+};
+
+template<bool ComputeTruth>
+bool operator<( cut_type<ComputeTruth, cut_enumeration_tech_map_cut> const& c1, cut_type<ComputeTruth, cut_enumeration_tech_map_cut> const& c2 )
+{
+  constexpr auto eps{ 0.005f };
+  if ( c1.size() < c2.size() )
+    return true;
+  if ( c1.size() > c2.size() )
+    return false;
+  if ( c1->data.delay < c2->data.delay )
+    return true;
+  if ( c1->data.delay > c2->data.delay )
+    return false;
+  return c1->data.flow < c2->data.flow - eps;
+}
+
+template<>
+struct cut_enumeration_update_cut<cut_enumeration_tech_map_cut>
+{
+  template<typename Cut, typename NetworkCuts, typename Ntk>
+  static void apply( Cut& cut, NetworkCuts const& cuts, Ntk const& ntk, node<Ntk> const& n )
+  {
+    uint32_t delay{ 0 };
+    float flow = 1.0f;
+
+    for ( auto leaf : cut )
+    {
+      const auto& best_leaf_cut = cuts.cuts( leaf )[0];
+      delay = std::max( delay, best_leaf_cut->data.delay );
+      flow += best_leaf_cut->data.flow;
+    }
+
+    cut->data.delay = 1 + delay;
+    cut->data.flow = flow / ntk.fanout_size( n );
+  }
+};
+
+template<int MaxLeaves>
+std::ostream& operator<<( std::ostream& os, cut<MaxLeaves, cut_data<false, cut_enumeration_tech_map_cut>> const& c )
+{
+  os << "{ ";
+  std::copy( c.begin(), c.end(), std::ostream_iterator<uint32_t>( os, " " ) );
+  os << "}, D = " << std::setw( 3 ) << c->data.delay << " A = " << c->data.flow;
+  return os;
+}
+
+} // namespace mockturtle