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qemu/arm: Let NETDUINO2 and MICROBIT boards run tests.
#15803
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Code size report: |
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Codecov ReportAll modified and coverable lines are covered by tests ✅
Additional details and impacted files@@ Coverage Diff @@
## master #15803 +/- ##
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Coverage 98.58% 98.58%
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Files 167 167
Lines 21596 21596
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Hits 21291 21291
Misses 305 305 ☔ View full report in Codecov by Sentry. |
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The asm tests issues are going to disappear once the inline asm detector in "run-tests.py" gets merged from the inline rv32 asm PR, Turns out my VM is too slow for those tests to finish in time - wonder why that happens only on the microbit board and not on others, go figure... |
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Some PTY targets, namely `NETDUINO2` and `MICROBIT` under Qemu, take a bit more time to present a REPL than usual. The pyboard tool is a bit too impatient and would bail out before any of those targets had a chance to respond to the raw REPL request. Co-authored-by: Damien George <damien@micropython.org> Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
When a CPU exception is raised when emulating a Thumb-capable processor, the default exception handler would simply enter in an endless loop without providing any further information. This commit adds a more complete exception handler that dumps to STDOUT the exception cause and the status of the registers at the moment of the exception. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
The Micro:Bit machine definition in Qemu has soft MMU support enabled, which is currently not compatible with the way MicroPython generates code that needs to call back into non-emitted code. As a stop-gap solution, the native code emitter for the MICROBIT board is turned off. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
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Summary
The NETDUINO2 and MICROBIT boards would not run the test suite in their current form. The former would make the test runner bail out before a REPL is ready, the latter would trigger a CPU hard fault due to Qemu's soft MMU enabled for that particular machine definition (see details).
As a bonus, Thumb targets now have a slightly more appealing crash reporting, with the exception cause and the registers content dumped to STDOUT.
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armv7m_nvic_neg_prio_requestedtriggers the exception - a NVIC priority of -1 signals a hard fault)Testing
Ran the tests for the two boards in question under Qemu (where else?).
Trade-offs and Alternatives
There should be a better way to disable soft MMU in Qemu and let MICROBIT still emit native code, but I haven't found a proper solution at the moment.