[SPIR-V] Fix precision for dot2add

[luciechoi]

Fixes #7695 (part of offload test suite)

HLSL spec indicates that the elements are mutilplied with half-precision but the summation results in a float. OpDot requires the ResultType to be the same as the vector's ComponentType, so this opcode cannot be used.

The fix is to untangle OpDot -- multiply half2 vectors and convert them to float before summing the elements.

[s-perron]

I'm not convinced this is the correct interpretation of the description of dot2add.

A 2-dimensional floating point dot-product of half2 vectors with add. Multiplies the elements of the two half-precision float input vectors together and sums the results into the 32-bit float accumulator. This instructions operates within a single 32-bit wide SIMD lane. The inputs are 16-bit quantities packed into the same lane.

This instructions operates within a single 32-bit wide SIMD lane. The inputs are 16-bit quantities packed into the same lane.

This suggest that the multiplications should be done as 16-bit operations.

sums the results into the 32-bit float accumulator.

This suggests that the sum is done as a 32-bit operation.

The correct code might be:

%2 = OpMul %vhalf_n %input %input
%3 = OpFConvert %vfloat_n %2
// for i = 0 to n-1
%ex_i = OpCompositeExtract %float %3 <i>

%sum_1 = OpFAdd %float %ex_0 %ex_1
// for i = 2 to n-1
%sum_i = OpFAdd %sum_<i-1> %ex_i

Repeat the instructions, do not put a loop in the spir-v.

[luciechoi]

This suggest that the multiplications should be done as 16-bit operations.

You are right, thanks for the detailed explanation!

[s-perron]

/AzurePipelines run

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