[stm32] Separate ULPI clock from OTGHS clock

To run the OTGHS port in FS mode the ULPI clock must be disabled.

Author: salkinium

ext/st/module.lb

@@ -178,6 +178,8 @@ def common_peripherals(env):
             all_peripherals.add(dname)
         if dname == "Dma" and d["type"] == "stm32-mux":
             all_peripherals.add("Dmamux1")
+        if dname == "Usbotghs":
+            all_peripherals.add("Usbotghsulpi")
 
     all_peripherals.discard(None)
     all_peripherals = sorted(list(all_peripherals))

src/modm/platform/clock/stm32/module.lb

@@ -177,11 +177,10 @@ def build(env):
         # Fix USBOTG OTG
         if target.family == "u5" and per == "OTG":
             per = "Usbotgfs"
-        if "Usbotgfs" in all_peripherals and per.startswith("OTG"):
-            if per == "OTGH":
-                per = "OTGHS"
+        if ("Usbotgfs" in all_peripherals or "Usbotghs" in all_peripherals) and per.startswith("OTG"):
+            if per == "OTGH": per = "OTGHS"
             per = "USB"+per
-        if "Usbotgfs" in all_peripherals and per.startswith("USB"):
+        if ("Usbotgfs" in all_peripherals or "Usbotghs" in all_peripherals) and per.startswith("USB"):
             per = per.replace("USB1", "USB").replace("USB2", "USB")
         if target.family == "l5" and per == "USBFS":
             per = "Usb"
@@ -190,7 +189,7 @@ def build(env):
         if "EN" in mode:
             rcc_enable[per.capitalize()] = (nper, mode["EN"])
         if "RST" in mode:
-            rcc_reset[nper] = mode["RST"]
+            rcc_reset[per.capitalize()] = (nper, mode["RST"])
 
     env.substitutions.update({
         "rcc_enable": rcc_enable,

src/modm/platform/clock/stm32/rcc_impl.hpp.in

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019, 2021 Niklas Hauser
+ * Copyright (c) 2019, 2021, 2024, Niklas Hauser
  *
  * This file is part of the modm project.
  *
@@ -123,13 +123,12 @@ Rcc::enable()
 	__DSB();
 	%% for peripheral, (st_per, bus) in rcc_enable.items() | sort
 	if constexpr (peripheral == Peripheral::{{ peripheral }})
-		if (not Rcc::isEnabled<peripheral>()) {
-			RCC->{{bus}} |= RCC_{{bus}}_{{st_per}}EN;{% if st_per in rcc_reset %} __DSB();
-			RCC->{{rcc_reset[st_per]}} |= RCC_{{rcc_reset[st_per]}}_{{st_per}}RST; __DSB();
-			RCC->{{rcc_reset[st_per]}} &= ~RCC_{{rcc_reset[st_per]}}_{{st_per}}RST;{% endif %}{% if peripheral == "Eth" %} __DSB();
+		{% if peripheral in rcc_reset %}if (not Rcc::isEnabled<peripheral>()) {% endif %}{
+			RCC->{{bus}} |= RCC_{{bus}}_{{st_per}}EN;{% if peripheral in rcc_reset %} __DSB();
+			RCC->{{rcc_reset[peripheral][1]}} |= RCC_{{rcc_reset[peripheral][1]}}_{{rcc_reset[peripheral][0]}}RST; __DSB();
+			RCC->{{rcc_reset[peripheral][1]}} &= ~RCC_{{rcc_reset[peripheral][1]}}_{{rcc_reset[peripheral][0]}}RST;{% endif %}{% if peripheral == "Eth" %} __DSB();
 			RCC->{{bus}} |= RCC_{{bus}}_{{st_per}}RXEN; __DSB();
-			RCC->{{bus}} |= RCC_{{bus}}_{{st_per}}TXEN;{% elif peripheral == "Usbotghs" %} __DSB();
-			RCC->{{bus}} |= RCC_{{bus}}_{{st_per}}ULPIEN;{% endif %}
+			RCC->{{bus}} |= RCC_{{bus}}_{{st_per}}TXEN;{% endif %}
 		}
 	%% endfor
 	__DSB();
@@ -147,8 +146,7 @@ Rcc::disable()
 	if constexpr (peripheral == Peripheral::{{ peripheral }}) {
 		RCC->{{bus}} &= ~RCC_{{bus}}_{{st_per}}EN;{% if peripheral == "Eth" %} __DSB();
 		RCC->{{bus}} &= ~RCC_{{bus}}_{{st_per}}RXEN; __DSB();
-		RCC->{{bus}} &= ~RCC_{{bus}}_{{st_per}}TXEN;{% elif peripheral == "Usbotghs" %} __DSB();
-		RCC->{{bus}} &= ~RCC_{{bus}}_{{st_per}}ULPIEN;{% endif %}
+		RCC->{{bus}} &= ~RCC_{{bus}}_{{st_per}}TXEN;{% endif %}
 	}
 	%% endfor
 	__DSB();