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SystemVerilog

Support Verilog: indent, syntax highlight
Support SystemVerilog: indent, syntax highlight, matchit, snipMate

Installation

###With Pathogen

Check out from github

## where ~/.vim is your vim files location
cd ~/.vim/bundle
git clone git://github.com/morganp/vim-SystemVerilog.git

Add as git submodule

## where ~/.vim is your vim files location
cd ~/.vim
git submodule add http://github.com/morganp/vim-SystemVerilog.git bundle/systemverilog
git add .
git commit -m "Install systemverilog.vim bundle as a submodule."

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Vim syntax etc for Verilog and SystemVerilog

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