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10 changes: 5 additions & 5 deletions content/architecture/class-libraries.md
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Expand Up @@ -102,15 +102,15 @@ The example is for adding System.Device.Gpio library.
- Declaration and common code bits (these always exist) inside the `src` folder. This is the place where the stubs must be placed:
- Common [System.Device.Gpio](https://github.com/nanoframework/nf-interpreter/tree/main/src/System.Device.Gpio).
- The specific implementation bits that are platform dependent and that will live 'inside' each platform RTOS folder:
- ChibiOS [System.Device.Gpio](https://github.com/nanoframework/nf-interpreter/tree/main/targets/ChibiOS/nanoCLR/System.Device.Gpio).
- ESP32 FreeRTOS [System.Device.Gpio](https://github.com/nanoframework/nf-interpreter/tree/main/targets/FreeRTOS_ESP32/ESP32_WROOM_32/nanoCLR/System.Device.Gpio).
- TI-RTOS [System.Device.Gpio](https://github.com/nanoframework/nf-interpreter/tree/main/targets/TI_SimpleLink/nanoCLR/System.Device.Gpio).
- ChibiOS [System.Device.Gpio](https://github.com/nanoframework/nf-interpreter/tree/main/targets/ChibiOS/_nanoCLR/System.Device.Gpio).
- ESP32 FreeRTOS [System.Device.Gpio](https://github.com/nanoframework/nf-interpreter/tree/main/targets/ESP32/_nanoCLR/System.Device.Gpio).
- TI-RTOS [System.Device.Gpio](https://github.com/nanoframework/nf-interpreter/tree/main/targets/TI_SimpleLink/_nanoCLR/System.Device.Gpio).

1. Add the CMake as a module to the modules folder [here](https://github.com/nanoframework/nf-interpreter/tree/develop/CMake/Modules). The name of the module should follow the assembly name (Find**System.Device.Gpio**.cmake). Mind the CMake rules for the naming: start with _Find_ followed by the module name and _cmake_ extension. The CMake for the System.Device.Gpio module is [here](https://github.com/nanoframework/nf-interpreter/blob/main/CMake/Modules/FindSystem.Device.Gpio.cmake).

1. In the CMake [NF_NativeAssemblies.cmake](https://github.com/nanoframework/nf-interpreter/blob/main/CMake/Modules/NF_NativeAssemblies.cmake) add an option for the API. The option name must follow the pattern API_**namespace**. The option for System.Device.Gpio is API_System.Device.Gpio.
1. In the CMake [FindNF_NativeAssemblies.cmake](https://github.com/nanoframework/nf-interpreter/blob/main/CMake/Modules/FindNF_NativeAssemblies.cmake) add an option for the API. The option name must follow the pattern API_**namespace**. The option for System.Device.Gpio is API_System.Device.Gpio.

1. In the CMake [NF_NativeAssemblies.cmake](https://github.com/nanoframework/nf-interpreter/blob/main/CMake/Modules/NF_NativeAssemblies.cmake) find the macro `ParseApiOptions` and add a block for the API. Just copy/paste an existing one and replace the namespace with the one that you are adding.
1. In the CMake [NF_NativeAssemblies.cmake](https://github.com/nanoframework/nf-interpreter/blob/main/CMake/Modules/FindNF_NativeAssemblies.cmake) find the text `WHEN ADDING A NEW API add the corresponding block below` and add a block for the API. Just copy/paste an existing one and replace the namespace with the one that you are adding.

1. Update the template file for the CMake presets [here](https://github.com/nanoframework/nf-interpreter/blob/main/CMakeUserPresets.TEMPLATE.json) to include the respective options. For the System.Device.Gpio example you would add to the _OPTION1..._ and _OPTION2..._ (under _linkage_) the following line: "API_System.Device.Gpio" : "OFF"

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2 changes: 1 addition & 1 deletion content/building/build-in-visual-studio.md
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Expand Up @@ -216,7 +216,7 @@ Manually create this directory to contain the following folders.

##### c:\nanoFramework_Tools\ChibiOS

Copy of the ChibiOS repository cloned from <https://github.com/nanoframework/chibios.git>
Copy of the ChibiOS repository cloned from <https://svn.osdn.net/svnroot/chibios/branches/stable_21.11.x>

##### C:\nanoFramework_Tools\Tools\openocd

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2 changes: 1 addition & 1 deletion content/building/build-instructions.md
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Expand Up @@ -40,7 +40,7 @@ If you are using VS Code as your development platform we suggest that you use th

In case you specify an RTOS and you want its source to be downloaded from the official repository, you'll need:

- For ChibiOS a SVN client. [Tortoise SVN](https://tortoisesvn.net/downloads) seems to be a popular choice for Windows machines.
- For ChibiOS a SVN client. [Tortoise SVN](https://tortoisesvn.net/downloads.html) seems to be a popular choice for Windows machines.
- For all the other repositories a Git client. [Fork](https://git-fork.com/) it's a great visual git client packed with a lot of features or [GitHub Desktop](https://desktop.github.com/) seems to be a popular choice for Windows machines.

## Preparation
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2 changes: 1 addition & 1 deletion content/building/cmake-presets.md
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Expand Up @@ -115,7 +115,7 @@ Below is a list of the build options available (last updated October 2022) for t
- "NF_FEATURE_RTC" : **`OFF`**
- Allows you to specify whether to use the real time clock unit of the hardware for date & time functions. Depends on target availability. Default is `OFF`.
- "NF_FEATURE_USE_APPDOMAINS" : **`OFF`**
- Allows you to specify whether to include, or not, support for Application Domains. Default is `OFF`. More information about this is available in the documentation [here](https://msdn.microsoft.com/en-us/library/cxk374d9(v=vs.90).aspx). **Note that the complete removal of support for this feature is being considered (see issue [here](https://github.com/nanoframework/nf-interpreter/issues/303)).**
- Allows you to specify whether to include, or not, support for Application Domains. Default is `OFF`. More information about this is available in the documentation [here](https://msdn.microsoft.com/en-us/library/cxk374d9(v=vs.90).aspx). **Note that the complete removal of support for this feature is being considered.**
- "NF_FEATURE_SUPPORT_REFLECTION": "ON"
- Set to `OFF` to disable support for System.Reflection API.
- "NF_FEATURE_BINARY_SERIALIZATION": **`ON`**
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2 changes: 1 addition & 1 deletion content/esp32/esp32_pin_out.md
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Expand Up @@ -2,7 +2,7 @@

ESP32 Pin out differ depending of the physical hardware. What is common is the GPIO numbering. So refer to the documentation of your specific board to find out the physical relation.

You can find all the details for the default mapping in [this file](https://github.com/nanoframework/nf-interpreter/blob/main/targets/FreeRTOS_ESP32/ESP32_WROOM_32/common/Esp32_DeviceMapping.cpp)
You can find all the details for the default mapping in [this file](https://github.com/nanoframework/nf-interpreter/blob/main/targets/ESP32/_common/DeviceMapping_common.cpp)

The default mapping defines how the pins are configured on start up. These pins configurations can be configured/redefined using the nanoFramework.Hardware.Esp32 assembly.

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10 changes: 5 additions & 5 deletions content/hal-pal/chibios/clr-managed-heap.md
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Expand Up @@ -7,9 +7,9 @@ This document describes how the CLR manged heap is defined as a ChibiOS target.
For STM32 based devices:
The configurations are chained by linker files:

- the target linker file provided for the nanoCLR in the target board folder, e.g. [STM32F091xC.ld](https://github.com/nanoframework/nf-interpreter/blob/main/targets/CMSIS-OS/ChibiOS/ST_NUCLEO_F091RC/nanoCLR/STM32F091xC.ld) and from within calls rules.ld **except** the F7 series which calls rules_clr.ld, rules_code.ld, rules_data.ld and rules_stacks.ld directly.
- [rules.ld](https://github.com/nanoframework/nf-interpreter/blob/main/targets/CMSIS-OS/ChibiOS/common/rules.ld) (which is common to all STM32 based ChibiOS targets and calls the next set of linker files)
- [rules_clr.ld](https://github.com/nanoframework/nf-interpreter/blob/main/targets/CMSIS-OS/ChibiOS/common/rules_clr.ld), [rules_code.ld](https://github.com/nanoframework/nf-interpreter/blob/main/targets/CMSIS-OS/ChibiOS/common/rules_code.ld), [rules_data.ld](https://github.com/nanoframework/nf-interpreter/blob/main/targets/CMSIS-OS/ChibiOS/common/rules_data.ld) and [rules_stacks.ld](https://github.com/nanoframework/nf-interpreter/blob/main/targets/CMSIS-OS/ChibiOS/common/rules_stacks.ld)
- the target linker file provided for the nanoCLR in the target board folder, e.g. [STM32F091xC.ld](https://github.com/nanoframework/nf-interpreter/tree/main/targets/ChibiOS/ST_NUCLEO64_F091RC/nanoCLR/STM32F091xC_CLR.ld) and from within calls rules.ld **except** the F7 series which calls rules_clr.ld, rules_code.ld, rules_data.ld and rules_stacks.ld directly.
- [rules.ld](https://github.com/nanoframework/nf-interpreter/tree/main/targets/ChibiOS/_common/rules.ld) (which is common to all STM32 based ChibiOS targets and calls the next set of linker files)
- [rules_clr.ld](https://github.com/nanoframework/nf-interpreter/tree/main/targets/ChibiOS/_common/rules_clr.ld), [rules_code.ld](https://github.com/nanoframework/nf-interpreter/tree/main/targets/ChibiOS/_common/rules_code.ld), [rules_data.ld](https://github.com/nanoframework/nf-interpreter/tree/main/targets/ChibiOS/_common/rules_data.ld) and [rules_stacks.ld](https://github.com/nanoframework/nf-interpreter/tree/main/targets/ChibiOS/_common/rules_stacks.ld)

## Managed heap location and size

Expand All @@ -21,15 +21,15 @@ This empowers developers to create new target boards with maximum flexibility of

### Definition the CLR managed heap location

The location of the CLR managed heap is set in in target linker file provided for nanoCLR in the target boards folder, e.g. [STM32F091xC_CLR.ld](https://github.com/nanoframework/nf-interpreter/blob/develop/targets/CMSIS-OS/ChibiOS/ST_NUCLEO64_F091RC/nanoCLR/STM32F091xC_CLR.ld)
The location of the CLR managed heap is set in in target linker file provided for nanoCLR in the target boards folder, e.g. [STM32F091xC_CLR.ld](https://github.com/nanoframework/nf-interpreter/tree/main/targets/ChibiOS/ST_NUCLEO64_F091RC/nanoCLR/STM32F091xC_CLR.ld)

For example the line (usually toward the end of the file) will contain something similar to `REGION_ALIAS("CLR_MANAGED_HEAP_RAM", ram0);`. The example stated here defines CLR manged heap location as being set in the _ram0_ region. The RAM regions and respective sizes are defined in the same file. For further information, please check the ChibiOS documentation for details on how to define further RAM regions.

### Size of the CLR managed heap

The size of the CLR managed heap is automatically adjusted to take all the available RAM space after the CRT heap (if it's assigned to that same RAM region).

It maybe be required to adjust the size of the CRT heap. This is set in the CMake file of the target board, e.g. [CMakeLists.txt](https://github.com/nanoframework/nf-interpreter/blob/develop/targets/CMSIS-OS/ChibiOS/ST_NUCLEO64_F091RC/CMakeLists.txt).
It maybe be required to adjust the size of the CRT heap. This is set in the CMake file of the target board, e.g. [CMakeLists.txt](https://github.com/nanoframework/nf-interpreter/tree/main/targets/ChibiOS/ST_NUCLEO64_F091RC/CMakeLists.txt).
Look for the `__crt_heap_size__` definition in a line that contain something similar to `--defsym=__crt_heap_size__=0x800`. In the example stated here the size of CRT heap is being set to 0x800.

When defining the size you need to take into account several factors:
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2 changes: 1 addition & 1 deletion content/hal-pal/chibios/external-memory.md
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Expand Up @@ -19,7 +19,7 @@ Considering that the default placement of the CLR managed is in the SoC internal

### Example for STM32F429I-Discovery reference target

To provide a working example of this configuration we are taking the STM32F429I-Discovery reference target that is in the nf-interpreter repository [here](https://github.com/nanoframework/nf-interpreter/tree/main/targets/CMSIS-OS/ChibiOS/ST_STM32F429I_DISCOVERY).
To provide a working example of this configuration we are taking the STM32F429I-Discovery reference target that is in the nf-interpreter repository [here](https://github.com/nanoframework/nf-interpreter/tree/main/targets/ChibiOS/ST_STM32F429I_DISCOVERY).
This targets board has a 64Mbit SDRAM (the chip is the IS42S16400J).

1. The _target_ implementation is provided in the `target_external_memory.c` file that is located in the target base folder. This location allows the function to be reused by nanoCLR and nanoBooter, if desired. Plus, it's included in the compile sequence at a time that the target CPU and other required definitions are already set.
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2 changes: 1 addition & 1 deletion content/reference-targets/esp32-s2.md
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Expand Up @@ -15,7 +15,7 @@ You can check Espressif [Product Selector](https://products.espressif.com/#/prod

## TinyS2

![TinyS2](../../images/reference-targets/tinys2.jpg)
![TinyS2](../../images/reference-targets/TinyS2.jpg)

[TinyS2 Product page](https://unexpectedmaker.com/tinys2/)

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4 changes: 2 additions & 2 deletions content/reference-targets/esp32.md
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Expand Up @@ -25,9 +25,9 @@ All other images are built with variations of those images. There are variants t

All M5Stack boards carry ESP32 chips. Some are revision 1, others 3, and others PICO. Please checkout the [official documentation](https://docs.m5stack.com/en/products?id=core) to understand which one is based on which chip.

![M5 Stack](../../images/reference-targets/M5Stack.jpg)
![M5 Stack](../../images/reference-targets/m5stack.jpg)

![M5 Stick](../../images/reference-targets/M5Stick.jpg)
![M5 Stick](../../images/reference-targets/m5stick.jpg)

![ATOM](../../images/reference-targets/m5stack_atom.jpg)

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2 changes: 1 addition & 1 deletion content/reference-targets/index.md
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Expand Up @@ -10,7 +10,7 @@ We provide ready build firmware images for several reference target boards. Thes

## OrgPal boards

- [OrgPal PalThree](orgpal-palthree)
- [OrgPal PalThree](orgpal-palthree.md)

## STMicroelectronics boards

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2 changes: 1 addition & 1 deletion content/stm32/create-dfu-file.md
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Expand Up @@ -9,7 +9,7 @@ To manually flash firmware using ST DFUSE tools, get a copy of [ST DFUSE tools](
## Step one

- Locate the devices Device_BlockStorage.c file.
- E.g. the Netduino 3 file is located [here](https://github.com/nanoframework/nf-interpreter/blob/develop/targets/CMSIS-OS/ChibiOS/NETDUINO3_WIFI/common/Device_BlockStorage.c).
- E.g. the Netduino 3 file is located [here](https://github.com/nanoframework/nf-Community-Targets/blob/main/ChibiOS/NETDUINO3_WIFI/common/Device_BlockStorage.c).
- Find the BlockRegionInfo segment Start address and bytes per block.

Example:
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