nrfconnect · nvlsianpu · Sep 11, 2024 · Sep 12, 2024 · Sep 13, 2024 · Sep 3, 2024
diff --git a/Kconfig.zephyr b/Kconfig.zephyr
@@ -536,11 +536,10 @@ config NO_OPTIMIZATIONS
 endchoice
 
 config LTO
-	bool "Link Time Optimization [EXPERIMENTAL]"
+	bool "Link Time Optimization"
 	depends on !(GEN_ISR_TABLES || GEN_IRQ_VECTOR_TABLE) || ISR_TABLES_LOCAL_DECLARATION
 	depends on !NATIVE_LIBRARY
 	depends on !CODE_DATA_RELOCATION
-	select EXPERIMENTAL
 	help
 	  This option enables Link Time Optimization.
 

diff --git a/MAINTAINERS.yml b/MAINTAINERS.yml
@@ -1156,6 +1156,23 @@ Release Notes:
   tests:
     - drivers.clock
 
+"Drivers: Comparator":
+  status: maintained
+  maintainers:
+    - bjarki-andreasen
+  files:
+    - drivers/comparator/
+    - dts/bindings/comparator/
+    - include/zephyr/drivers/comparator.h
+    - include/zephyr/drivers/comparator/
+    - tests/drivers/build_all/comparator/
+    - tests/drivers/comparator/
+    - doc/hardware/peripherals/comparator.rst
+  labels:
+    - "area: Comparator"
+  tests:
+    - drivers.comparator
+
 "Drivers: Console":
   status: odd fixes
   files:

diff --git a/arch/arm/core/cortex_m/fault.c b/arch/arm/core/cortex_m/fault.c
@@ -743,7 +743,7 @@ static inline bool z_arm_is_pc_valid(uintptr_t pc)
 		return true;
 	}
 
-#if DT_NODE_HAS_STATUS(DT_CHOSEN(zephyr_itcm), okay)
+#if DT_NODE_HAS_STATUS_OKAY(DT_CHOSEN(zephyr_itcm))
 	/* Is it in the ITCM */
 	if ((((uintptr_t)&__itcm_start) <= pc) && (pc < ((uintptr_t)&__itcm_end))) {
 		return true;

diff --git a/arch/arm/core/cortex_m/pm_s2ram.S b/arch/arm/core/cortex_m/pm_s2ram.S
@@ -70,7 +70,9 @@ SECTION_FUNC(TEXT, arch_pm_s2ram_suspend)
 	/*
 	 * Mark entering suspend to RAM.
 	 */
-	bl pm_s2ram_mark_set
+	mov 	r1, lr
+	bl 	pm_s2ram_mark_set
+	mov	lr, r1
 
 	/*
 	 * Call the system_off function passed as parameter. This should never
@@ -86,7 +88,9 @@ SECTION_FUNC(TEXT, arch_pm_s2ram_suspend)
 	/*
 	 * Reset the marking of suspend to RAM, return is ignored.
 	 */
-	bl pm_s2ram_mark_check_and_clear
+	mov 	r1, lr
+	bl	pm_s2ram_mark_check_and_clear
+	mov 	lr, r1
 
 	/* Move system_off back to r0 as return value */
 	mov	r0, r4
@@ -99,16 +103,13 @@ GTEXT(arch_pm_s2ram_resume)
 SECTION_FUNC(TEXT, arch_pm_s2ram_resume)
 	/*
 	 * Check if reset occurred after suspending to RAM.
-	 * Store LR to ensure we can continue boot when we are not suspended
-	 * to RAM. In addition to LR, R0 is pushed too, to ensure "SP mod 8 = 0",
-	 * as stated by ARM rule 6.2.1.2 for AAPCS32.
 	 */
-	push    {r0, lr}
-	bl      pm_s2ram_mark_check_and_clear
-	cmp	r0, #0x1
-	pop     {r0, lr}
-	beq	resume
-	bx	lr
+	mov 	r1, lr
+	bl 	pm_s2ram_mark_check_and_clear
+	mov 	lr, r1
+	cmp     r0, #0x1
+	beq     resume
+	bx      lr
 
 resume:
 	/*

diff --git a/arch/arm/core/cortex_m/pm_s2ram.c b/arch/arm/core/cortex_m/pm_s2ram.c
@@ -22,20 +22,44 @@ __noinit _cpu_context_t _cpu_context;
  */
 static __noinit uint32_t marker;
 
-void pm_s2ram_mark_set(void)
+void __attribute__((naked)) pm_s2ram_mark_set(void)
 {
-	marker = MAGIC;
+	__asm__ volatile(
+		/* Set the marker to MAGIC value */
+		"str	%[_magic_val], [%[_marker]]\n"
+
+		"bx	lr\n"
+		:
+		: [_magic_val] "r"(MAGIC), [_marker] "r"(&marker)
+		: "r1", "r4", "memory");
 }
 
-bool pm_s2ram_mark_check_and_clear(void)
+bool __attribute__((naked)) pm_s2ram_mark_check_and_clear(void)
 {
-	if (marker == MAGIC) {
-		marker = 0;
+	__asm__ volatile(
+		/* Set return value to 0 */
+		"mov	r0, #0\n"
+
+		/* Check the marker */
+		"ldr	r3, [%[_marker]]\n"
+		"cmp	r3, %[_magic_val]\n"
+		"bne	exit\n"
+
+		/*
+		 * Reset the marker
+		 */
+		"str	r0, [%[_marker]]\n"
 
-		return true;
-	}
+		/*
+		 * Set return value to 1
+		 */
+		"mov	r0, #1\n"
 
-	return false;
+		"exit:\n"
+		"bx lr\n"
+		:
+		: [_magic_val] "r"(MAGIC), [_marker] "r"(&marker)
+		: "r0", "r1", "r3", "r4", "memory");
 }
 
 #endif /* CONFIG_PM_S2RAM_CUSTOM_MARKING */
diff --git a/boards/arm/v2m_musca_b1/pinmux.c b/boards/arm/v2m_musca_b1/pinmux.c
@@ -40,7 +40,7 @@ static void arm_musca_b1_pinmux_defaults(void)
 	scc[IOMUX_ALTF1_OUTSEL] = 0xffff;
 	scc[IOMUX_ALTF1_OENSEL] = 0xffff;
 
-#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart0), okay)
+#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(uart0))
 	/* clear bit 0/1 for GPIO0/1 to steer from ALTF1 */
 	scc[IOMUX_MAIN_INSEL] &= ~(BIT(0) | BIT(1));
 	scc[IOMUX_MAIN_OUTSEL] &= ~(BIT(0) | BIT(1));

diff --git a/boards/arm/v2m_musca_s1/pinmux.c b/boards/arm/v2m_musca_s1/pinmux.c
@@ -40,7 +40,7 @@ static void arm_musca_s1_pinmux_defaults(void)
 	scc[IOMUX_ALTF1_OUTSEL] = 0xffff;
 	scc[IOMUX_ALTF1_OENSEL] = 0xffff;
 
-#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart0), okay)
+#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(uart0))
 	/* clear bit 0/1 for GPIO0/1 to steer from ALTF1 */
 	scc[IOMUX_MAIN_INSEL]  &= ~(BIT(0) | BIT(1));
 	scc[IOMUX_MAIN_OUTSEL] &= ~(BIT(0) | BIT(1));

diff --git a/boards/digilent/arty_a7/board.c b/boards/digilent/arty_a7/board.c
@@ -16,7 +16,7 @@ LOG_MODULE_REGISTER(board, CONFIG_LOG_DEFAULT_LEVEL);
 
 #define DAPLINK_QSPI_MUX_NODE DT_NODELABEL(daplink_qspi_mux)
 
-#if DT_NODE_HAS_STATUS(DAPLINK_QSPI_MUX_NODE, okay)
+#if DT_NODE_HAS_STATUS_OKAY(DAPLINK_QSPI_MUX_NODE)
 int board_daplink_qspi_mux_select(enum board_daplink_qspi_mux_mode mode)
 {
 	struct gpio_dt_spec mux = GPIO_DT_SPEC_GET(DAPLINK_QSPI_MUX_NODE, mux_gpios);
@@ -77,4 +77,4 @@ static int board_init(void)
 }
 
 SYS_INIT(board_init, POST_KERNEL, CONFIG_BOARD_INIT_PRIORITY);
-#endif /* DT_NODE_HAS_STATUS(DAPLINK_QSPI_MUX_NODE, okay) */
+#endif /* DT_NODE_HAS_STATUS_OKAY(DAPLINK_QSPI_MUX_NODE) */
diff --git a/boards/native/nrf_bsim/CMakeLists.txt b/boards/native/nrf_bsim/CMakeLists.txt
@@ -56,6 +56,7 @@ zephyr_include_directories(
   common
   common/cmsis
   ${NSI_DIR}/common/src/include
+  ${ZEPHYR_BASE}/soc/nordic/common
 )
 
 zephyr_library_include_directories(

diff --git a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-ipc_conf.dtsi b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-ipc_conf.dtsi
@@ -9,19 +9,22 @@
 		cpusec_cpuapp_ipc: ipc-1-2 {
 			compatible = "zephyr,ipc-icmsg";
 			status = "disabled";
+			dcache-alignment = <32>;
 			mboxes = <&cpusec_bellboard 12>,
 				 <&cpuapp_bellboard 0>;
 		};
 
 		cpusec_cpurad_ipc: ipc-1-3 {
 			compatible = "zephyr,ipc-icmsg";
 			status = "disabled";
+			dcache-alignment = <32>;
 			mboxes = <&cpusec_bellboard 18>,
 				 <&cpurad_bellboard 0>;
 		};
 
 		cpuapp_cpurad_ipc: ipc-2-3 {
 			compatible = "zephyr,ipc-icbmsg";
+			dcache-alignment = <32>;
 			status = "disabled";
 			mboxes = <&cpuapp_bellboard 18>,
 				 <&cpurad_bellboard 12>;
@@ -30,27 +33,31 @@
 		cpuapp_cpusys_ipc: ipc-2-12 {
 			compatible = "zephyr,ipc-icmsg";
 			status = "disabled";
+			dcache-alignment = <32>;
 			mboxes = <&cpuapp_bellboard 6>,
 				 <&cpusys_vevif 12>;
 		};
 
 		cpuapp_cpuppr_ipc: ipc-2-13 {
 			compatible = "zephyr,ipc-icmsg";
 			status = "disabled";
+			dcache-alignment = <32>;
 			mboxes = <&cpuapp_bellboard 13>,
 				 <&cpuppr_vevif 12>;
 		};
 
 		cpuapp_cpuflpr_ipc: ipc-2-14 {
 			compatible = "zephyr,ipc-icmsg";
 			status = "disabled";
+			dcache-alignment = <32>;
 			mboxes = <&cpuapp_bellboard 14>,
 				 <&cpuflpr_vevif 16>;
 		};
 
 		cpurad_cpusys_ipc: ipc-3-12 {
 			compatible = "zephyr,ipc-icmsg";
 			status = "disabled";
+			dcache-alignment = <32>;
 			mboxes = <&cpurad_bellboard 6>,
 				 <&cpusys_vevif 18>;
 		};

diff --git a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_0_8_0.dtsi b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_0_8_0.dtsi
@@ -0,0 +1,15 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/delete-node/ &suit_storage_partition;
+
+/ {
+	reserved-memory {
+		suit_storage_partition: memory@e1eb000 {
+			reg = <0xe1eb000 DT_SIZE_K(24)>;
+		};
+	};
+};
diff --git a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp_0_8_0.overlay b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp_0_8_0.overlay
@@ -0,0 +1,7 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "nrf54h20dk_nrf54h20_0_8_0.dtsi"
diff --git a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuflpr_0_8_0.overlay b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuflpr_0_8_0.overlay
@@ -0,0 +1,7 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "nrf54h20dk_nrf54h20_0_8_0.dtsi"
diff --git a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuppr_0_8_0.overlay b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuppr_0_8_0.overlay
@@ -0,0 +1,7 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "nrf54h20dk_nrf54h20_0_8_0.dtsi"
diff --git a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpurad_0_8_0.overlay b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpurad_0_8_0.overlay
@@ -0,0 +1,7 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "nrf54h20dk_nrf54h20_0_8_0.dtsi"
diff --git a/boards/nordic/nrf7002dk/nrf7002dk_nrf5340_cpuapp.dts b/boards/nordic/nrf7002dk/nrf7002dk_nrf5340_cpuapp.dts
@@ -32,7 +32,6 @@
 		qspi-quad-mode;
 
 		#include "nrf70_common.dtsi"
-		#include "nrf70_common_coex.dtsi"
 		#include "nrf70_common_5g.dtsi"
 	};
 };
diff --git a/boards/nordic/nrf7002dk/nrf7002dk_nrf5340_cpuapp_nrf7001.dts b/boards/nordic/nrf7002dk/nrf7002dk_nrf5340_cpuapp_nrf7001.dts
@@ -32,6 +32,5 @@
 		qspi-quad-mode;
 
 		#include "nrf70_common.dtsi"
-		#include "nrf70_common_coex.dtsi"
 	};
 };
diff --git a/boards/nordic/nrf7002dk/nrf7002dk_nrf5340_cpuapp_nrf7001_ns.dts b/boards/nordic/nrf7002dk/nrf7002dk_nrf5340_cpuapp_nrf7001_ns.dts
@@ -35,6 +35,5 @@
 		qspi-quad-mode;
 
 		#include "nrf70_common.dtsi"
-		#include "nrf70_common_coex.dtsi"
 	};
 };
diff --git a/boards/nordic/nrf7002dk/nrf7002dk_nrf5340_cpuapp_ns.dts b/boards/nordic/nrf7002dk/nrf7002dk_nrf5340_cpuapp_ns.dts
@@ -35,7 +35,6 @@
 		qspi-quad-mode;
 
 		#include "nrf70_common.dtsi"
-		#include "nrf70_common_coex.dtsi"
 		#include "nrf70_common_5g.dtsi"
 	};
 };
diff --git a/boards/nordic/nrf7002dk/nrf7002dk_nrf5340_cpunet.dts b/boards/nordic/nrf7002dk/nrf7002dk_nrf5340_cpunet.dts
@@ -82,11 +82,14 @@
 			   <21 0 &gpio1 3 0>;	/* D15 */
 	};
 
-	nrf70: coex {
+	nrf_radio_coex: coex {
 		status = "okay";
-		compatible = "nordic,nrf70-coex";
+		compatible = "nordic,nrf7002-coex";
 
-		#include "nrf70_common_coex.dtsi"
+		req-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
+		status0-gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
+		grant-gpios = <&gpio0 24 (GPIO_PULL_DOWN | GPIO_ACTIVE_LOW)>;
+		swctrl1-gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
 	};
 
 	/* These aliases are provided for compatibility with samples */

diff --git a/boards/nordic/nrf7002dk/nrf70_common.dtsi b/boards/nordic/nrf7002dk/nrf70_common.dtsi
@@ -7,6 +7,7 @@
 iovdd-ctrl-gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
 bucken-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
 host-irq-gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
+srrf-switch-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
 
 wifi-max-tx-pwr-2g-dsss = <21>;
 wifi-max-tx-pwr-2g-mcs0 = <16>;

diff --git a/boards/nordic/nrf7002dk/nrf70_common_coex.dtsi b/boards/nordic/nrf7002dk/nrf70_common_coex.dtsi
diff --git a/boards/nordic/nrf9160dk/board.c b/boards/nordic/nrf9160dk/board.c
@@ -32,7 +32,7 @@ LOG_MODULE_REGISTER(board_control, CONFIG_BOARD_NRF9160DK_LOG_LEVEL);
 				 GET_PORT(reset_input, gpios, 0) == 0 && \
 				 GET_PIN(reset_input, gpios, 0) == 18)
 #define USE_RESET_GPIO \
-	(DT_NODE_HAS_STATUS(DT_NODELABEL(reset_input), okay) && \
+	(DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(reset_input)) && \
 	 !RESET_INPUT_IS_PINRESET)
 
 struct switch_cfg {
@@ -47,7 +47,7 @@ struct switch_cfg {
 #endif
 };
 
-#define ROUTING_ENABLED(_name) DT_NODE_HAS_STATUS(DT_NODELABEL(_name), okay)
+#define ROUTING_ENABLED(_name) DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(_name))
 #define SWITCH_CFG(_name, _idx)					\
 {								\
 	.gpio  = GET_DEV(_name, control_gpios, _idx),		\

diff --git a/boards/nordic/nrf9160dk/nrf52840_reset.c b/boards/nordic/nrf9160dk/nrf52840_reset.c
@@ -12,7 +12,7 @@
 
 #define RESET_NODE DT_NODELABEL(nrf52840_reset)
 
-#if DT_NODE_HAS_STATUS(RESET_NODE, okay)
+#if DT_NODE_HAS_STATUS_OKAY(RESET_NODE)
 
 #define RESET_GPIO_CTRL  DT_GPIO_CTLR(RESET_NODE, gpios)
 #define RESET_GPIO_PIN   DT_GPIO_PIN(RESET_NODE, gpios)
@@ -65,4 +65,4 @@ int bt_hci_transport_setup(const struct device *h4)
 	return 0;
 }
 
-#endif /* DT_NODE_HAS_STATUS(RESET_NODE, okay) */
+#endif /* DT_NODE_HAS_STATUS_OKAY(RESET_NODE) */