55/* */
66/* OpenPOWER OnChipController Project */
77/* */
8- /* Contributors Listed Below - COPYRIGHT 2015 */
8+ /* Contributors Listed Below - COPYRIGHT 2015,2016 */
99/* [+] International Business Machines Corp. */
1010/* */
1111/* */
@@ -325,18 +325,19 @@ void amec_wof_validate_input_data(void)
325325 }
326326}
327327
328- uint32_t amec_wof_compute_c_eff ( void )
328+ uint32_t amec_wof_compute_ceff_tdp ( uint8_t i_cores_on )
329329{
330+ // Example of calculation for Nominal operating point at 85C:
330331 // Estimate IDDQ@RDP(95C)@Vnom P0:
331332 // IDDQ@85C * 1.25 ^ ([95-85]/10) = 35.84 * 1.25 = 44.8 A (Leakage current)
332333 //
333334 // NM_Idd@RDP P0 = 151 A
334335 //
335336 // P0: (151 A - 44.8 A) / 1.22 * 1.12 = 97.50 A @TDP
336337 //
337- // C_eff = I / (V^3 * F)
338+ // C_eff = I / (V^1. 3 * F)
338339 //
339- // I is ??? in 0.01 Amps (or 10 mA)
340+ // I is AC component of Idd in 0.01 Amps (or 10 mA)
340341 // V is the silicon voltage from the operating point data in 100 uV
341342 // F is Turbo frequency in MHz
342343 // C_eff is in nF
@@ -397,7 +398,8 @@ uint32_t amec_wof_compute_c_eff(void)
397398 G_sysConfigData .iddq_table .iddq_vdd [i ].fields .iddq_corrected_value ;
398399
399400 // STEP 3: Correct the leakage current computed in the previous step for
400- // temperature by multiplying by 1.25
401+ // temperature by multiplying by 1.25 (due to 10 C difference between IDDQ
402+ // VPD operationg point data).
401403 l_i_leak = l_i_leak * 125 / 100 ;
402404
403405 // STEP 4: Compute current differential in 10mA units at RDP
@@ -420,6 +422,9 @@ uint32_t amec_wof_compute_c_eff(void)
420422 l_c_eff_tdp = l_temp /
421423 G_sysConfigData .wof_parms .operating_points [TURBO ].frequency_mhz ;
422424
425+ // STEP 9: Scale for number of cores on
426+ l_c_eff_tdp = l_c_eff_tdp * i_cores_on / G_wof_max_cores_per_chip ;
427+
423428 return l_c_eff_tdp ;
424429}
425430
@@ -448,6 +453,7 @@ int amec_wof_set_algorithm(const uint8_t i_algorithm)
448453 int l_scom_rc = 0 ;
449454 static uint8_t l_failCount = 0 ;
450455 errlHndl_t l_err = NULL ;
456+ uint8_t i ;
451457
452458 do
453459 {
@@ -493,7 +499,9 @@ int amec_wof_set_algorithm(const uint8_t i_algorithm)
493499 amec_wof_validate_input_data ();
494500
495501 // Calculate ceff_tdp from static data in the Pstate SuperStructure
496- g_amec -> wof .ceff_tdp = amec_wof_compute_c_eff ();
502+ // FIX: Should compute this constant outside AMEC loop at boot.
503+ for (i = 1 ; i <=G_wof_max_cores_per_chip ; i ++ )
504+ g_amec -> wof .ceff_tdp [i ] = amec_wof_compute_ceff_tdp (i );
497505
498506 switch (i_algorithm )
499507 {
@@ -547,7 +555,7 @@ int amec_wof_set_algorithm(const uint8_t i_algorithm)
547555
548556 TRAC_INFO ("WOF algorithm has been successfully initialized: algo_type[%d] C_eff_tdp[%d]" ,
549557 g_amec -> wof .algo_type ,
550- g_amec -> wof .ceff_tdp );
558+ g_amec -> wof .ceff_tdp [ MAX_NUM_CORES ] );
551559 }
552560 else
553561 {
@@ -789,8 +797,8 @@ void amec_wof_common_steps(void)
789797 // Note: IDDQ value from table above is in 0.01 A units. The maximum
790798 // value possible is 655.35 A. This means l_result <= 65535.
791799
792- // Modify leakage value for cores off . A percentage of chip leakage comes
793- // from iVRM headers which cannot be turned off completely.
800+ // Modify leakage value for number of cores on . A percentage of chip
801+ // leakage comes from iVRM headers which cannot be turned off completely.
794802 l_result32 = l_result32
795803 * (g_amec_wof_leak_overhead
796804 + ((1000 - g_amec_wof_leak_overhead )
@@ -890,7 +898,8 @@ void amec_wof_common_steps(void)
890898 }
891899 g_amec -> wof .ceff_old = l_result32 ;
892900
893- l_ceff_ratio = g_amec -> wof .ceff_old * 10000 / g_amec -> wof .ceff_tdp ;
901+ l_ceff_ratio = g_amec -> wof .ceff_old * 10000
902+ / g_amec -> wof .ceff_tdp [l_cores_on ];
894903 // expose as sensor and parameter
895904 g_amec -> wof .ceff_ratio = l_ceff_ratio ;
896905 sensor_update (AMECSENSOR_PTR (WOFCEFFRATIO ),l_ceff_ratio );
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