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Feature/flush ctrl in csrwrite #99

Merged

Commits on Mar 2, 2023

  1. [rtl] Flush controller in PMP CSR write ops

    As Greg pointed out:
    
    When we have an instruction in ID/EX that writes a PMP register that
    update gets written to the CSR the same cycle the next instruction
    moves from IF to ID/EX with it's PMP check done with the old value.
    
    The solution is to flush the pipeline when we get a PMP CSR write.
    
    Signed-off-by: Canberk Topal <ctopal@lowrisc.org>
    ctopal authored and szbieg committed Mar 2, 2023
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  2. [rtl] Flush pipe on MSECCFG CSR write

    Without this an instruction executed immediately after the MSECCFG write
    doesn't have the new MSECCFG setup applied to its execute permission.
    GregAC authored and szbieg committed Mar 2, 2023
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