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8355563: VectorAPI: Refactor current implementation of subword gather load API #25138

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8355563: VectorAPI: Refactor current implementation of subword gather load API #25138

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8355563: VectorAPI: Refactor current implementation of subword gather…
XiaohongGong Apr 24, 2025
c47f764
Merge 'jdk:master' into JDK-8355563
XiaohongGong Jun 25, 2025
7b05f02
Address review comments
XiaohongGong Jun 25, 2025
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50 changes: 17 additions & 33 deletions src/hotspot/cpu/x86/c2_MacroAssembler_x86.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1591,67 +1591,52 @@ void C2_MacroAssembler::vinsert(BasicType typ, XMMRegister dst, XMMRegister src,
}
}

void C2_MacroAssembler::vgather8b_masked_offset(BasicType elem_bt,
XMMRegister dst, Register base,
Register idx_base,
Register offset, Register mask,
Register mask_idx, Register rtmp,
int vlen_enc) {
void C2_MacroAssembler::vgather8b_masked(BasicType elem_bt, XMMRegister dst,
Register base, Register idx_base,
Register mask, Register mask_idx,
Register rtmp, int vlen_enc) {
vpxor(dst, dst, dst, vlen_enc);
if (elem_bt == T_SHORT) {
for (int i = 0; i < 4; i++) {
// dst[i] = mask[i] ? src[offset + idx_base[i]] : 0
// dst[i] = mask[i] ? src[idx_base[i]] : 0
Label skip_load;
btq(mask, mask_idx);
jccb(Assembler::carryClear, skip_load);
movl(rtmp, Address(idx_base, i * 4));
if (offset != noreg) {
addl(rtmp, offset);
}
pinsrw(dst, Address(base, rtmp, Address::times_2), i);
bind(skip_load);
incq(mask_idx);
}
} else {
assert(elem_bt == T_BYTE, "");
for (int i = 0; i < 8; i++) {
// dst[i] = mask[i] ? src[offset + idx_base[i]] : 0
// dst[i] = mask[i] ? src[idx_base[i]] : 0
Label skip_load;
btq(mask, mask_idx);
jccb(Assembler::carryClear, skip_load);
movl(rtmp, Address(idx_base, i * 4));
if (offset != noreg) {
addl(rtmp, offset);
}
pinsrb(dst, Address(base, rtmp), i);
bind(skip_load);
incq(mask_idx);
}
}
}

void C2_MacroAssembler::vgather8b_offset(BasicType elem_bt, XMMRegister dst,
Register base, Register idx_base,
Register offset, Register rtmp,
int vlen_enc) {
void C2_MacroAssembler::vgather8b(BasicType elem_bt, XMMRegister dst,
Register base, Register idx_base,
Register rtmp, int vlen_enc) {
vpxor(dst, dst, dst, vlen_enc);
if (elem_bt == T_SHORT) {
for (int i = 0; i < 4; i++) {
// dst[i] = src[offset + idx_base[i]]
// dst[i] = src[idx_base[i]]
movl(rtmp, Address(idx_base, i * 4));
if (offset != noreg) {
addl(rtmp, offset);
}
pinsrw(dst, Address(base, rtmp, Address::times_2), i);
}
} else {
assert(elem_bt == T_BYTE, "");
for (int i = 0; i < 8; i++) {
// dst[i] = src[offset + idx_base[i]]
// dst[i] = src[idx_base[i]]
movl(rtmp, Address(idx_base, i * 4));
if (offset != noreg) {
addl(rtmp, offset);
}
pinsrb(dst, Address(base, rtmp), i);
}
}
Expand Down Expand Up @@ -1680,11 +1665,10 @@ void C2_MacroAssembler::vgather8b_offset(BasicType elem_bt, XMMRegister dst,
*/
void C2_MacroAssembler::vgather_subword(BasicType elem_ty, XMMRegister dst,
Register base, Register idx_base,
Register offset, Register mask,
XMMRegister xtmp1, XMMRegister xtmp2,
XMMRegister temp_dst, Register rtmp,
Register mask_idx, Register length,
int vector_len, int vlen_enc) {
Register mask, XMMRegister xtmp1,
XMMRegister xtmp2, XMMRegister temp_dst,
Register rtmp, Register mask_idx,
Register length, int vector_len, int vlen_enc) {
Label GATHER8_LOOP;
assert(is_subword_type(elem_ty), "");
movl(length, vector_len);
Expand All @@ -1698,9 +1682,9 @@ void C2_MacroAssembler::vgather_subword(BasicType elem_ty, XMMRegister dst,
bind(GATHER8_LOOP);
// TMP_VEC_64(temp_dst) = PICK_SUB_WORDS_FROM_GATHER_INDICES
if (mask == noreg) {
vgather8b_offset(elem_ty, temp_dst, base, idx_base, offset, rtmp, vlen_enc);
vgather8b(elem_ty, temp_dst, base, idx_base, rtmp, vlen_enc);
} else {
vgather8b_masked_offset(elem_ty, temp_dst, base, idx_base, offset, mask, mask_idx, rtmp, vlen_enc);
vgather8b_masked(elem_ty, temp_dst, base, idx_base, mask, mask_idx, rtmp, vlen_enc);
}
// TEMP_PERM_VEC(temp_dst) = PERMUTE TMP_VEC_64(temp_dst) PERM_INDEX(xtmp1)
vpermd(temp_dst, xtmp1, temp_dst, vlen_enc == Assembler::AVX_512bit ? vlen_enc : Assembler::AVX_256bit);
Expand Down
13 changes: 6 additions & 7 deletions src/hotspot/cpu/x86/c2_MacroAssembler_x86.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -492,15 +492,14 @@

void efp16sh(int opcode, XMMRegister dst, XMMRegister src1, XMMRegister src2);

void vgather_subword(BasicType elem_ty, XMMRegister dst, Register base, Register idx_base, Register offset,
Register mask, XMMRegister xtmp1, XMMRegister xtmp2, XMMRegister xtmp3, Register rtmp,
void vgather_subword(BasicType elem_ty, XMMRegister dst, Register base, Register idx_base, Register mask,
XMMRegister xtmp1, XMMRegister xtmp2, XMMRegister xtmp3, Register rtmp,
Register midx, Register length, int vector_len, int vlen_enc);

void vgather8b_masked_offset(BasicType elem_bt, XMMRegister dst, Register base, Register idx_base,
Register offset, Register mask, Register midx, Register rtmp, int vlen_enc);

void vgather8b_offset(BasicType elem_bt, XMMRegister dst, Register base, Register idx_base,
Register offset, Register rtmp, int vlen_enc);
void vgather8b_masked(BasicType elem_bt, XMMRegister dst, Register base, Register idx_base,
Register mask, Register midx, Register rtmp, int vlen_enc);
void vgather8b(BasicType elem_bt, XMMRegister dst, Register base, Register idx_base,
Register rtmp, int vlen_enc);

void vector_saturating_op(int opc, BasicType elem_bt, XMMRegister dst, XMMRegister src1, XMMRegister src2, bool is_unsigned, int vlen_enc);

Expand Down
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