Intel-SIG: Add new Intel CPU# definition #60
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commit 090e3be upstream. Server product based on the Atom Darkmont core. Intel-SIG: commit 090e3be x86/cpu: Add model number for Intel Clearwater Forest processor. BACKPORTING NEW CPU IFM Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20240117191844.56180-1-tony.luck@intel.com [ Quanxian Wang: amend commit log ] Signed-off-by: Quanxian Wang <quanxian.wang@intel.com>
commit 8a8a9c9 upstream. This one is the regular laptop CPU. Intel-SIG: commit 8a8a9c9 x86/cpu: Add model number for another Intel Arrow Lake mobile processor. BACKPORTING NEW CPU IFM Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20240322161725.195614-1-tony.luck@intel.com [ Quanxian Wang: amend commit log ] Signed-off-by: Quanxian Wang <quanxian.wang@intel.com>
commit a9d0adc upstream. Refactor struct cpuinfo_x86 so that the vendor, family, and model fields are overlaid in a union with a 32-bit field that combines all three (together with a one byte reserved field in the upper byte). This will make it easy, cheap, and reliable to check all three values at once. See https://lore.kernel.org/r/Zgr6kT8oULbnmEXx@agluck-desk3 for why the ordering is (low-to-high bits): (vendor, family, model) [ bp: Move comments over the line, add the backstory about the particular order of the fields. ] Intel-SIG: commit a9d0adc x86/cpu/vfm: Add/initialize x86_vfm field to struct cpuinfo_x86. BACKPORTING NEW CPU IFM Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240416211941.9369-2-tony.luck@intel.com [ Quanxian Wang: amend commit log ] Signed-off-by: Quanxian Wang <quanxian.wang@intel.com>
commit f055b62 upstream. New CPU #defines encode vendor and family as well as model. Update the example usage comment in arch/x86/kernel/cpu/match.c Intel-SIG: commit f055b62 x86/cpu/vfm: Update arch/x86/include/asm/intel-family.h. BACKPORTING NEW CPU IFM Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240416211941.9369-4-tony.luck@intel.com [ Quanxian Wang: amend commit log ] Signed-off-by: Quanxian Wang <quanxian.wang@intel.com>
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…l-kernel-6.6' into intel-6.6-velinux backporting contains f055b62,x86/cpu/vfm: Update arch/x86/include/asm/intel-family.h,2024-04-16 14:19:05,Tony Luck tony.luck@intel.com,v6.10-rc1 e6dfdc2,x86/cpu/vfm: Add new macros to work with (vendor/family/model) values,2024-04-16 14:19:04,Tony Luck tony.luck@intel.com,v6.10-rc1 - has been included in 6.6 by upgrade a9d0adc,x86/cpu/vfm: Add/initialize x86_vfm field to struct cpuinfo_x86,2024-04-16 14:19:03,Tony Luck tony.luck@intel.com,v6.10-rc1 8a8a9c9,x86/cpu: Add model number for another Intel Arrow Lake mobile processor,2024-03-24 04:08:10,Tony Luck tony.luck@intel.com,v6.9-rc1 090e3be,x86/cpu: Add model number for Intel Clearwater Forest processor,2024-01-23 11:08:08,Tony Luck tony.luck@intel.com,v6.8-rc2 Conflicts: arch/x86/include/asm/intel-family.h [jz: conflicts already in velinux kernel]
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…te-OOB-EMR-GNR-SRF-CWF' into intel-6.6-velinux Support OOB CPU frequency control for EMR/GNR/SRF/GRR/CWF. Note: this PR also includes all the patches in openvelinux#60, because it depends on the CWF CPUID support in that PR. Tests: The OOB CPU frequency control is only available on certain SKUs. Tested this patch series on regular SKUs and no regression found.
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…cwf' into intel-6.6-velinux Add IFS support for ClearWater Forest Note: this PR also includes all the patches in openvelinux#60, because it depends on the CWF CPUID support in that PR. Tests: Tested on CWF, the IFS feature works as expected.
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…elinux [jz: first rebase to 6.6-velinux, dropping following commit 17ef7ed memblock: use numa_valid_node() helper to check for invalid node ID because it is already in] Add EDAC basic support and RRL enhancement for CWF/SRF/GNR/GNR-D Note: this PR also includes all the patches in openvelinux#60, because it depends on the CWF CPUID support in that PR. Tests: Tested on GNR, the error injection works as expected, the Machine check exceptions are dumped with extra RRL information. Tested on CWF, the EDAC/Error injection starts to work. the Machine check exceptions are dumped together with RRL information.
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…linux Add SST support for ClearWater Forest Note: this PR also includes all the patches in openvelinux#60, because it depends on the CWF CPUID support in that PR. Tests: Tested on CWF, SST driver can be loaded, and SST information can be dumped via intel-speed-select userspace tool.
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…aseline-6.6-velinux Support OOB CPU frequency control for EMR/GNR/SRF/GRR/CWF. Note: this PR also includes all the patches in openvelinux#60, because it depends on the CWF CPUID support in that PR. Tests: The OOB CPU frequency control is only available on certain SKUs. Tested this patch series on regular SKUs and no regression found.
x56Jason
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Add IFS support for ClearWater Forest Note: this PR also includes all the patches in openvelinux#60, because it depends on the CWF CPUID support in that PR. Tests: Tested on CWF, the IFS feature works as expected.
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[jz: first rebase to intel-baseline-6.6-velinux: $ git rebase intel-baseline-6.6-velinux warning: skipped previously applied commit 5c05eae warning: skipped previously applied commit e7f6efe warning: skipped previously applied commit 295436e warning: skipped previously applied commit e1951ae warning: skipped previously applied commit eff4058 warning: skipped previously applied commit a304d0d hint: use --reapply-cherry-picks to include skipped commits hint: Disable this message with "git config advice.skippedCherryPicks false" dropping 17ef7ed memblock: use numa_valid_node() helper to check for invalid node ID -- patch contents already upstream Successfully rebased and updated refs/heads/intel-edac-cwf. then merge] Add EDAC basic support and RRL enhancement for CWF/SRF/GNR/GNR-D Note: this PR also includes all the patches in openvelinux#60, because it depends on the CWF CPUID support in that PR. Tests: Tested on GNR, the error injection works as expected, the Machine check exceptions are dumped with extra RRL information. Tested on CWF, the EDAC/Error injection starts to work. the Machine check exceptions are dumped together with RRL information.
x56Jason
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Nov 10, 2025
Add SST support for ClearWater Forest Note: this PR also includes all the patches in openvelinux#60, because it depends on the CWF CPUID support in that PR. Tests: Tested on CWF, SST driver can be loaded, and SST information can be dumped via intel-speed-select userspace tool.
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backporting contains
f055b62,x86/cpu/vfm: Update arch/x86/include/asm/intel-family.h,2024-04-16 14:19:05,Tony Luck tony.luck@intel.com,v6.10-rc1
e6dfdc2,x86/cpu/vfm: Add new macros to work with (vendor/family/model) values,2024-04-16 14:19:04,Tony Luck tony.luck@intel.com,v6.10-rc1 - has been included in 6.6 by upgrade
a9d0adc,x86/cpu/vfm: Add/initialize x86_vfm field to struct cpuinfo_x86,2024-04-16 14:19:03,Tony Luck tony.luck@intel.com,v6.10-rc1
8a8a9c9,x86/cpu: Add model number for another Intel Arrow Lake mobile processor,2024-03-24 04:08:10,Tony Luck tony.luck@intel.com,v6.9-rc1
090e3be,x86/cpu: Add model number for Intel Clearwater Forest processor,2024-01-23 11:08:08,Tony Luck tony.luck@intel.com,v6.8-rc2