stm32h7-startup: reorder AXI erratum and cache setup #2259
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mkeeter
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Sep 30, 2025
hawkw
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Sep 30, 2025
@mkeeter noticed nondeterminism in the delay loop for measurement handoff, which caused us to realize that it was being performed _before_ the caches were set up ... which means small alignment changes in flash can have huge impact on the execution time of a tight loop. While considering fixes, I noticed that the fix for the AXI SRAM read erratum had gradually drifted below other code. This was safe when I initially implemented it, because we weren't using AXI SRAM for kernel stack etc. at the time. We are now! This commit moves the AXI SRAM erratum fix into pre_init where it runs before most RAM accesses, and moves cache setup earlier in system_init_custom to ensure that caches are on for the rest of the process, including measurement handoff.
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@mkeeter noticed nondeterminism in the delay loop for measurement handoff, which caused us to realize that it was being performed before the caches were set up ... which means small alignment changes in flash can have huge impact on the execution time of a tight loop.
While considering fixes, I noticed that the fix for the AXI SRAM read erratum had gradually drifted below other code. This was safe when I initially implemented it, because we weren't using AXI SRAM for kernel stack etc. at the time. We are now!
This commit moves the AXI SRAM erratum fix into pre_init where it runs before most RAM accesses, and moves cache setup earlier in system_init_custom to ensure that caches are on for the rest of the process, including measurement handoff.