fix x86_64 performance regression #43
Merged
+5
−3
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This appears to fix the performance regression on x86_64 CPUs (at least on my local dev box).
CPU profiles suggested that
v.is_nullhas a fair amount of dynamic dispatch indirection (it's an &Arc<dyn Array>cast itself as&dyn Array). Extracting thelogical_nullsout (should be ~ a reference count cycle for simple arrays) allows better inlining.I guess this might have somehow upset the x86_64 branch predictor? Maybe the dynamic dispatch made the call chain complex enough that the branch predictor was preempting the result of
is_nullincorrectly.