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Add INT16 support to permute operation for TOSA backend #15138
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Summary: ## Summary Add INT16 dtype support to the permute (transpose) operation in the ARM TOSA backend, following the same pattern as other int16-enabled operations like conv2d. ## Problem The `aten.permute_copy.default` operation only supported INT8, INT32, and FP32 dtypes. INT16 support was missing, which blocks int16 quantized models that use permutation operations (e.g., LSTM with int16 activations). ## Solution - Added INT16 to the list of valid dtypes for permute operation - Used proper TOSA spec extension check: `tosa_spec.support_extension("int16")` - Follows the established pattern from other int16-enabled operations ## Implementation Details ```python # Build list of valid dtypes based on TOSA spec valid_dtypes = [ts.DType.INT8, ts.DType.INT32, ts.DType.FP32] if isinstance(output.tosa_spec, Tosa_1_00) and output.tosa_spec.support_extension("int16"): valid_dtypes.append(ts.DType.INT16) ``` This ensures INT16 support is only enabled when: 1. Using TOSA 1.0 spec 2. The "int16" extension is supported by the target hardware ## TOSA Specification According to TOSA spec, the TRANSPOSE operation (used by permute) supports INT16 when the int16 extension is enabled. This change aligns the implementation with the specification. ## Impact - Enables int16 quantized models to use permutation operations - Required for LSTM int16 quantization support - Follows existing patterns in codebase (low risk) ## Files Changed - `fbcode/executorch/backends/arm/operators/op_permute.py` - `xplat/executorch/backends/arm/operators/op_permute.py` (mirrored) --- > Generated by [RACER](https://www.internalfb.com/wiki/RACER_(Risk-Aware_Code_Editing_and_Refactoring)/), powered by [Confucius](https://www.internalfb.com/wiki/Confucius/Analect/Shared_Analects/Confucius_Code_Assist_(CCA)/) [Session](https://www.internalfb.com/confucius?session_id=d505e146-a8c6-11f0-942f-6b00b4b362c1&tab=Chat) Differential Revision: D84642353
🔗 Helpful Links🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/15138
Note: Links to docs will display an error until the docs builds have been completed. ❌ 1 New FailureAs of commit fefed27 with merge base 926312e ( NEW FAILURE - The following job has failed:
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This PR needs a
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if isinstance( | ||
output.tosa_spec, Tosa_1_00 | ||
) and output.tosa_spec.support_extension("int16"): | ||
valid_dtypes.append(ts.DType.INT16) |
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Add tests for INT16?
Summary:
Summary
Add INT16 dtype support to the permute (transpose) operation in the ARM TOSA backend, following the same pattern as other int16-enabled operations like conv2d.
Problem
The
aten.permute_copy.default
operation only supported INT8, INT32, and FP32 dtypes. INT16 support was missing, which blocks int16 quantized models that use permutation operations (e.g., LSTM with int16 activations).Solution
tosa_spec.support_extension("int16")
Implementation Details
This ensures INT16 support is only enabled when:
TOSA Specification
According to TOSA spec, the TRANSPOSE operation (used by permute) supports INT16 when the int16 extension is enabled. This change aligns the implementation with the specification.
Impact
Files Changed
fbcode/executorch/backends/arm/operators/op_permute.py
xplat/executorch/backends/arm/operators/op_permute.py
(mirrored)Differential Revision: D84642353