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Please use the attached 'docx' files to get an idea of the restructured architecture suggested Awaiting comments & insights Ron |
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It is difficult to read these in word. Could you include them in a post using the code fencing? The <> button above provides the needed syntax.
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Thanks Ray I've attached a zip file containing the primary py files I used to run this modified architecture. It is meant to give an idea of the structure to be used + its extensibility. Additional implementation modules are still kept private - for now. |
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Last thing: the zip file is a sibling of the current examples\TinyALU folder |
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Thanks Ray
As you suggested, I've uploaded a zip file containing *testbench.py*,
*BfmConcentrator.py* - modified skeleton files for pyuvm verification
Ron
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using the code fencing? The <> button above provides the needed syntax.
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testbench.docx
BfmConcentrator.docx
April 15, 2023
Following the excellent skeleton provided by Ray Salemi and others in https://lnkd.in/dvCaep3d , for handling a robust chip verification under Python, I'd like to suggest a small contribution which enables an arbitrary expansion of the verification platform.
The original Tiny-ALU example existing in the git-hub consists of an 'engine' (which drives the verification process) and 'DUT-like' portion which implements the specific activities carried-out by the emulated unit. The boundaries between the two entities are somewhat violated.
In a restructuring process, I modified the Tiny-ALU example such that it has been separated from the 'engine' portion - which may now be used as a general framework for testing an arbitrary type of DUT (or numerous of DUTs, simultaneously) – as required – per the system under test.
The current architecture yields identical results to the original framework.
For additional details, please contact me: ronzolti@gmail.com
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