add some syscalls

.gitattributes

@@ -1 +1,2 @@
 prebuilt/* filter=lfs diff=lfs merge=lfs -text
+prebuilt/zircon/fuchsia.zbi filter=lfs diff=lfs merge=lfs -text

.github/workflows/main.yml

@@ -11,7 +11,7 @@ jobs:
     - uses: actions-rs/toolchain@v1
       with:
         profile: minimal
-        toolchain: nightly
+        toolchain: nightly-2020-01-17
         override: true
         components: rustfmt, clippy
     - name: Check code format
@@ -51,18 +51,9 @@ jobs:
       with:
         command: build
         args: --all-features
-    - name: Build for riscv32
-      uses: actions-rs/cargo@v1
-      with:
-        command: build
-        args: --package kernel-hal-bare --target riscv32imac-unknown-none-elf
-    - name: Build for riscv64
-      uses: actions-rs/cargo@v1
-      with:
-        command: build
-        args: --package kernel-hal-bare --target riscv64imac-unknown-none-elf
     - name: Build zCore
       run: |
+        cargo install cargo-xbuild
         cd zCore
         make build
     - name: Build docs

Cargo.toml

@@ -7,13 +7,11 @@ members = [
     "linux-syscall",
     "linux-loader",
     "kernel-hal-unix",
-    "kernel-hal-bare",
     "kernel-hal",
-    "kernel-hal-bare",
-    "kernel-hal-bare",
 ]
 
 exclude = [
 	"zCore",
 	"rboot",
+    "kernel-hal-bare",
 ]

kernel-hal-bare/Cargo.toml

@@ -10,7 +10,9 @@ description = "Kernel HAL implementation for bare metal environment."
 [dependencies]
 log = "0.4"
 spin = "0.5"
-bitflags = "1.2"
+executor = { git = "https://github.com/PanQL/executor.git", rev="1818b01" }
+trapframe = "0.1.1"
+core = { package = "core-futures-tls", version = "0.1.0" }
 kernel-hal = { path = "../kernel-hal" }
 
 [target.'cfg(target_arch = "x86_64")'.dependencies]

kernel-hal-bare/src/arch/riscv.rs

@@ -1,6 +1,7 @@
 use super::*;
 use riscv::paging::{*, PageTableFlags as PTF};
 use riscv::addr::Page;
+use riscv::register::satp;
 
 /// Page Table
 #[repr(C)]
@@ -17,7 +18,8 @@ impl PageTableImpl {
         let root_vaddr = phys_to_virt(root_frame.paddr);
         let root = unsafe { &mut *(root_vaddr as *mut PageTable) };
         root.zero();
-        map_kernel(root_vaddr as _);
+        let current = phys_to_virt(satp::read().frame().start_address().as_usize()) as *const PageTable;
+        map_kernel(root_vaddr as _, current as _);
         trace!("create page table @ {:#x}", root_frame.paddr);
         PageTableImpl { root_paddr: root_frame.paddr }
     }
@@ -88,6 +90,14 @@ impl PageTableImpl {
     }
 }
 
+pub unsafe fn set_page_table(vmtoken: usize) {
+    #[cfg(target_arch = "riscv32")]
+    let mode = satp::Mode::Sv32;
+    #[cfg(target_arch = "riscv64")]
+    let mode = satp::Mode::Sv39;
+    satp::set(mode, 0, vmtoken >> 12);
+}
+
 trait FlagsExt {
     fn to_ptf(self) -> PTF;
 }
@@ -104,6 +114,9 @@ impl FlagsExt for MMUFlags {
         if self.contains(MMUFlags::EXECUTE) {
             flags |= PTF::EXECUTABLE;
         }
+        if self.contains(MMUFlags::USER) {
+            flags |= PTF::USER;
+        }
         flags
     }
 }
@@ -127,3 +140,5 @@ impl FrameDeallocator for FrameAllocatorImpl {
         .dealloc()
     }
 }
+
+pub fn init() {}

kernel-hal-bare/src/arch/x86_64.rs

@@ -1,12 +1,11 @@
 use {
     super::*,
     apic::{LocalApic, XApic},
-    bitflags::bitflags,
     core::fmt::{Arguments, Write},
     spin::Mutex,
     uart_16550::SerialPort,
     x86_64::{
-        registers::control::Cr3,
+        registers::control::{Cr3, Cr3Flags},
         structures::paging::{PageTableFlags as PTF, *},
     },
 };
@@ -31,7 +30,7 @@ impl PageTableImpl {
         let root_vaddr = phys_to_virt(root_frame.paddr);
         let root = unsafe { &mut *(root_vaddr as *mut PageTable) };
         root.zero();
-        map_kernel(root_vaddr as _);
+        map_kernel(root_vaddr as _, frame_to_page_table(Cr3::read().0) as _);
         trace!("create page table @ {:#x}", root_frame.paddr);
         PageTableImpl {
             root_paddr: root_frame.paddr,
@@ -49,9 +48,13 @@ impl PageTableImpl {
         let mut pt = self.get();
         let page = Page::<Size4KiB>::from_start_address(vaddr).unwrap();
         let frame = unsafe { UnusedPhysFrame::new(PhysFrame::from_start_address(paddr).unwrap()) };
-        pt.map_to(page, frame, flags.to_ptf(), &mut FrameAllocatorImpl)
-            .unwrap()
-            .flush();
+        let flush = pt
+            .map_to(page, frame, flags.to_ptf(), &mut FrameAllocatorImpl)
+            .unwrap();
+        if flags.contains(MMUFlags::USER) {
+            self.allow_user_access(vaddr);
+        }
+        flush.flush();
         trace!("map: {:x?} -> {:x?}, flags={:?}", vaddr, paddr, flags);
         Ok(())
     }
@@ -71,7 +74,11 @@ impl PageTableImpl {
     pub fn protect(&mut self, vaddr: x86_64::VirtAddr, flags: MMUFlags) -> Result<(), ()> {
         let mut pt = self.get();
         let page = Page::<Size4KiB>::from_start_address(vaddr).unwrap();
-        pt.update_flags(page, flags.to_ptf()).unwrap().flush();
+        let flush = pt.update_flags(page, flags.to_ptf()).unwrap();
+        if flags.contains(MMUFlags::USER) {
+            self.allow_user_access(vaddr);
+        }
+        flush.flush();
         trace!("protect: {:x?}, flags={:?}", vaddr, flags);
         Ok(())
     }
@@ -91,26 +98,38 @@ impl PageTableImpl {
         let offset = x86_64::VirtAddr::new(phys_to_virt(0) as u64);
         unsafe { OffsetPageTable::new(root, offset) }
     }
+
+    /// Set user bit for 4-level PDEs of the page of `vaddr`.
+    ///
+    /// This is a workaround since `x86_64` crate does not set user bit for PDEs.
+    fn allow_user_access(&mut self, vaddr: x86_64::VirtAddr) {
+        let mut page_table = phys_to_virt(self.root_paddr) as *mut PageTable;
+        for level in 0..4 {
+            let index = (vaddr.as_u64() as usize >> (12 + (3 - level) * 9)) & 0o777;
+            let entry = unsafe { &mut (&mut *page_table)[index] };
+            let flags = entry.flags();
+            entry.set_flags(flags | PTF::USER_ACCESSIBLE);
+            if level == 3 || flags.contains(PTF::HUGE_PAGE) {
+                return;
+            }
+            page_table = frame_to_page_table(entry.frame().unwrap());
+        }
+    }
 }
 
-pub fn kernel_root_table() -> &'static PageTable {
-    unsafe { &*frame_to_page_table(Cr3::read().0) }
+#[allow(clippy::missing_safety_doc)]
+pub unsafe fn set_page_table(vmtoken: usize) {
+    Cr3::write(
+        PhysFrame::containing_address(x86_64::PhysAddr::new(vmtoken as _)),
+        Cr3Flags::empty(),
+    );
 }
 
 fn frame_to_page_table(frame: PhysFrame) -> *mut PageTable {
     let vaddr = phys_to_virt(frame.start_address().as_u64() as usize);
     vaddr as *mut PageTable
 }
 
-bitflags! {
-    pub struct MMUFlags: usize {
-        #[allow(clippy::identity_op)]
-        const READ      = 1 << 0;
-        const WRITE     = 1 << 1;
-        const EXECUTE   = 1 << 2;
-    }
-}
-
 trait FlagsExt {
     fn to_ptf(self) -> PTF;
 }
@@ -127,6 +146,9 @@ impl FlagsExt for MMUFlags {
         if !self.contains(MMUFlags::EXECUTE) {
             flags |= PTF::NO_EXECUTE;
         }
+        if self.contains(MMUFlags::USER) {
+            flags |= PTF::USER_ACCESSIBLE;
+        }
         flags
     }
 }
@@ -154,23 +176,15 @@ impl FrameDeallocator<Size4KiB> for FrameAllocatorImpl {
 static COM1: Mutex<SerialPort> = Mutex::new(unsafe { SerialPort::new(0x3F8) });
 
 pub fn putfmt(fmt: Arguments) {
-    unsafe {
-        COM1.force_unlock();
-    }
     COM1.lock().write_fmt(fmt).unwrap();
 }
 
 #[export_name = "hal_serial_write"]
 pub fn serial_write(s: &str) {
-    unsafe {
-        COM1.force_unlock();
-    }
-    for byte in s.bytes() {
-        COM1.lock().send(byte);
-    }
+    COM1.lock().write_str(s).unwrap();
 }
 
-pub fn timer_init() {
+fn timer_init() {
     let mut lapic = unsafe { XApic::new(phys_to_virt(LAPIC_ADDR)) };
     lapic.cpu_init();
 }
@@ -180,3 +194,8 @@ pub fn ack(_irq: u8) {
     let mut lapic = unsafe { XApic::new(phys_to_virt(LAPIC_ADDR)) };
     lapic.eoi();
 }
+
+/// Initialize the HAL.
+pub fn init() {
+    timer_init();
+}

kernel-hal-bare/src/lib.rs

@@ -23,26 +23,113 @@ extern crate log;
 
 extern crate alloc;
 
+use alloc::boxed::Box;
+use alloc::sync::Arc;
+use core::{
+    future::Future,
+    pin::Pin,
+    task::{Context, Poll},
+};
 use kernel_hal::defs::*;
 
 pub mod arch;
 
 #[allow(improper_ctypes)]
 extern "C" {
-    fn hal_pt_map_kernel(pt: *mut u8);
+    fn hal_pt_map_kernel(pt: *mut u8, current: *const u8);
     fn hal_frame_alloc() -> Option<PhysAddr>;
     fn hal_frame_dealloc(paddr: &PhysAddr);
     #[link_name = "hal_pmem_base"]
     static PMEM_BASE: usize;
 }
 
+#[repr(C)]
+pub struct Thread {
+    thread: usize,
+}
+
+impl Thread {
+    #[export_name = "hal_thread_spawn"]
+    pub fn spawn(thread: Arc<usize>, regs: GeneralRegs, vmtoken: usize) -> Self {
+        struct PageTableSwitchWrapper<F: Future> {
+            inner: F,
+            vmtoken: usize,
+        }
+        impl<F: Future> Future for PageTableSwitchWrapper<F> {
+            type Output = F::Output;
+            fn poll(self: Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<Self::Output> {
+                unsafe {
+                    arch::set_page_table(self.vmtoken);
+                }
+                let inner: Pin<&mut F> =
+                    unsafe { core::mem::transmute(&mut self.get_unchecked_mut().inner) };
+                inner.poll(cx)
+            }
+        }
+
+        let future = async move {
+            thread_set_state(&thread, &regs);
+            let mut context = trapframe::UserContext {
+                // safety: same structure
+                general: unsafe { core::mem::transmute(regs) },
+                ..Default::default()
+            };
+            loop {
+                // 判断线程状态是否是RUNNABLE,不是则返回Pending
+                unsafe {
+                    thread_check_runnable(&thread).await;
+                }
+                context.run();
+                if context.error_code != 0 {
+                    panic!("{:#x?}", context);
+                }
+                assert_eq!(context.trap_num, 0x100, "user interrupt still no support");
+                let exit = unsafe { handle_syscall(&thread, &mut context.general).await };
+                if exit {
+                    break;
+                }
+            }
+        };
+        executor::spawn(PageTableSwitchWrapper {
+            inner: future,
+            vmtoken,
+        });
+        Thread { thread: 0 }
+    }
+}
+
+#[linkage = "weak"]
+#[no_mangle]
+extern "C" fn handle_syscall(
+    _thread: &Arc<usize>,
+    _regs: &mut trapframe::GeneralRegs,
+) -> Pin<Box<dyn Future<Output = bool> + Send>> {
+    // exit by default
+    Box::pin(async { true })
+}
+
+#[linkage = "weak"]
+#[export_name = "thread_set_state"]
+pub fn thread_set_state(_thread: &Arc<usize>, _state: &GeneralRegs) {
+    unimplemented!()
+}
+
+/// Check whether a thread is runnable
+#[linkage = "weak"]
+#[no_mangle]
+extern "C" fn thread_check_runnable(
+    _thread: &Arc<usize>,
+) -> Pin<Box<dyn Future<Output = ()> + Send>> {
+    Box::pin(async {})
+}
+
 /// Map kernel for the new page table.
 ///
 /// `pt` is a page-aligned pointer to the root page table.
 #[allow(clippy::not_unsafe_ptr_arg_deref)]
-pub fn map_kernel(pt: *mut u8) {
+pub fn map_kernel(pt: *mut u8, current: *const u8) {
     unsafe {
-        hal_pt_map_kernel(pt);
+        hal_pt_map_kernel(pt, current);
     }
 }
 
@@ -85,16 +172,19 @@ pub fn pmem_write(paddr: PhysAddr, buf: &[u8]) {
 }
 
 /// Initialize the HAL.
-///
-/// Call this anywhere to ensure this lib being linked.
-pub fn init() {}
+pub fn init() {
+    unsafe {
+        trapframe::init();
+    }
+    arch::init();
+}
 
 #[cfg(test)]
 mod tests {
     use super::*;
 
     #[no_mangle]
-    extern "C" fn hal_pt_map_kernel(_pt: *mut u8) {
+    extern "C" fn hal_pt_map_kernel(_pt: *mut u8, _current: *const u8) {
         unimplemented!()
     }