Initial commit of Rustboot-based OS

LICENSE.txt

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+Copyright (c) 2015 Jeremy Soller, 2013 Charlie Somerville
+
+MIT License
+
+Permission is hereby granted, free of charge, to any person obtaining
+a copy of this software and associated documentation files (the
+"Software"), to deal in the Software without restriction, including
+without limitation the rights to use, copy, modify, merge, publish,
+distribute, sublicense, and/or sell copies of the Software, and to
+permit persons to whom the Software is furnished to do so, subject to
+the following conditions:
+
+The above copyright notice and this permission notice shall be
+included in all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Makefile

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+LD=ld
+RUSTC=rustc
+NASM=nasm
+QEMU=qemu-system-i386
+
+all: harddrive.img
+
+.SUFFIXES: .o .rs .asm
+
+.PHONY: clean run
+
+.rs.o:
+	$(RUSTC) -O -A dead-code -C relocation-model=dynamic-no-pic -C no-stack-check -Z no-landing-pads --target i686-unknown-linux-gnu --crate-type lib -o $@ --emit obj $<
+
+.rs.asm:
+	$(RUSTC) -O -A dead-code -C relocation-model=dynamic-no-pic -C no-stack-check -Z no-landing-pads --target i686-unknown-linux-gnu --crate-type lib -o $@ --emit asm $<
+
+.asm.o:
+	$(NASM) -f elf32 -o $@ $<
+
+harddrive.img: loader.asm kernel.bin
+	$(NASM) -o $@ -l loader.lst -f bin $<
+
+kernel.bin: linker.ld kernel.o
+	$(LD) -m elf_i386 -o $@ -T $^
+
+run: harddrive.img
+	$(QEMU) -serial mon:stdio -sdl -hda $<
+
+clean:
+	rm -f *.bin *.o *.img *.lst *.map

asm/idt.inc

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+struc IDTEntry
+	.offsetl	resw 1
+	.selector	resw 1
+	.zero1	resb 1
+	.attribute	resb 1
+		.present equ 1 << 7
+		.ring.1	equ 1 << 5
+		.ring.2 equ 1 << 6
+		.ring.3 equ 1 << 5 | 1 << 6
+		.task32 equ 0x5
+		.interrupt16 equ 0x6
+		.trap16 equ 0x7
+		.interrupt32 equ 0xE
+		.trap32 equ 0xF
+	.offsetm resw 1
+	.offseth resd 1
+	.zero2 resd 1
+endstruc

asm/initialize.asm

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+SECTION .text
+[BITS 16]
+initialize:
+.fpu: ;enable fpu
+	mov eax, cr4
+	or eax, 0x200
+	mov cr4, eax
+	mov eax, 0xB7F
+	push eax
+	fldcw [esp]
+	pop eax
+	ret
+
+.sse: ;enable sse
+	mov eax, cr0
+	and al, 11111011b
+	or al, 00000010b
+	mov cr0, eax
+	mov eax, cr4
+	or ax, 0000011000000000b
+	mov cr4, eax
+	ret
+
+.pic:	;sets up IRQs at int 20-2F
+	mov al, 0x11
+	out 0x20, al
+	out 0xA0, al
+	mov al, 0x20	;IRQ0 vector
+	out 0x21, al
+	mov al, 0x28	;IRQ8 vector
+	out 0xA1, al
+	mov al, 4
+	out 0x21, al
+	mov al, 2
+	out 0xA1, al
+	mov al, 1
+	out 0x21, al
+	out 0xA1, al
+	xor al, al		;no IRQ masks
+	out 0x21, al
+	out 0xA1, al
+	mov al, 0x20	;reset PIC's
+	out 0xA0, al
+	out 0x20, al
+	ret

asm/interrupts.asm

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+struc IDTEntry
+	.offsetl resw 1
+	.selector resw 1
+	.zero resb 1
+	.attribute resb 1
+		.present equ 1 << 7
+		.ring.1	equ 1 << 5
+		.ring.2 equ 1 << 6
+		.ring.3 equ 1 << 5 | 1 << 6
+		.task32 equ 0x5
+		.interrupt16 equ 0x6
+		.trap16 equ 0x7
+		.interrupt32 equ 0xE
+		.trap32 equ 0xF
+	.offseth resw 1
+endstruc
+
+[section .text]
+[BITS 32]
+interrupts:
+.first:
+	mov [0x200000], byte 0
+	jmp dword .handle
+.second:
+%assign i 1
+%rep 255
+	mov [0x200000], byte i
+	jmp dword .handle
+%assign i i+1
+%endrep
+.handle:
+	pushad
+	
+	mov al, [0x200000]
+	cmp al, 0x20
+	je .ignore
+	
+	mov eax, [kernel_file + 0x18]
+	call eax
+.ignore:
+    mov al, [0x200000]
+    
+    cmp al, 0x20
+    jb .not_irq
+    
+    cmp al, 0x30
+    jae .not_irq
+    
+    cmp al, 0x28
+    jb .not_slave
+    
+    mov dx, 0xA0
+    mov al, 0x20
+    out dx, al
+.not_slave:
+    mov dx, 0x20
+    mov al, 0x20
+    out dx, al
+.not_irq:
+	popad
+	iretd
+
+idtr:
+    dw (idt_end - idt) + 1
+    dd idt
+    
+idt:
+%assign i 0
+%rep 256	;fill in overrideable functions
+	istruc IDTEntry
+		at IDTEntry.offsetl, dw interrupts+(interrupts.second-interrupts.first)*i
+		at IDTEntry.selector, dw 0x08
+		at IDTEntry.attribute, db IDTEntry.present | IDTEntry.interrupt32
+	iend
+%assign i i+1
+%endrep
+idt_end:

asm/mouse.asm

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+mouse:
+SECTION .text
+[BITS 64]
+.init:
+	call .wait1
+	mov al, 0xA8
+	out 0x64, al
+	
+	call .wait1
+	mov al, 0x20
+	out 0x64, al
+	call .wait0
+	in al, 0x60
+	mov ah, al
+	or ah, 2
+	call .wait1
+	mov al, 0x60
+	out 0x64, al
+	call .wait1
+	mov al, ah
+	out 0x60, al
+	
+	mov bl, 0xF6
+	call .write
+	call .read
+	
+	mov bl, 0xF4
+	call .write
+	call .read
+	ret
+	
+.wait0:
+	mov rcx, 100000
+.wait0lp:
+	in al, 0x64
+	test al, 1
+	loopz .wait0lp
+.mousebyte:
+	ret
+	
+.wait1:
+	mov rcx, 100000
+.wait1lp:
+	in al, 0x64
+	test al, 2
+	loopnz .wait1lp
+	ret
+	
+.write:
+	call .wait1
+	mov al, 0xD4
+	out 0x64, al
+	call .wait1
+	mov al, bl
+	out 0x60, al
+	ret
+	
+.read:
+	call .wait0
+	in al, 0x60
+	ret
+