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Improve disassembler markup #1

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af434f9
InstPrinter: Add AArch64 register markup
Nov 26, 2020
af9c435
InstPrinter: Add AArch64 immediate markup
Nov 26, 2020
fea94ef
InstPrinter: Add SystemZ markup
Nov 26, 2020
87d69f0
InstPrinter: Add MIPS markup
Nov 27, 2020
6ae96a6
InstPrinter: Improve X86 markup
Dec 14, 2020
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234 changes: 150 additions & 84 deletions llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
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1 change: 1 addition & 0 deletions llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
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Expand Up @@ -28,6 +28,7 @@ class AArch64InstPrinter : public MCInstPrinter {
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
void printRegName(raw_ostream &OS, unsigned RegNo) const override;
void printRegName(raw_ostream &OS, unsigned RegNo, unsigned AltIdx) const;

// Autogenerated by tblgen.
virtual void printInstruction(const MCInst *MI, uint64_t Address,
Expand Down
9 changes: 6 additions & 3 deletions llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp
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Expand Up @@ -72,7 +72,8 @@ const char* Mips::MipsFCCToString(Mips::CondCode CC) {
}

void MipsInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
OS << '$' << StringRef(getRegisterName(RegNo)).lower();
OS << markup("<reg:") << '$' << StringRef(getRegisterName(RegNo)).lower()
<< markup(">");
}

void MipsInstPrinter::printInst(const MCInst *MI, uint64_t Address,
Expand Down Expand Up @@ -131,7 +132,7 @@ void MipsInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
}

if (Op.isImm()) {
O << formatImm(Op.getImm());
O << markup("<imm:") << formatImm(Op.getImm()) << markup(">");
return;
}

Expand All @@ -147,7 +148,7 @@ void MipsInstPrinter::printUImm(const MCInst *MI, int opNum, raw_ostream &O) {
Imm -= Offset;
Imm &= (1 << Bits) - 1;
Imm += Offset;
O << formatImm(Imm);
O << markup("<imm:") << formatImm(Imm) << markup(">");
return;
}

Expand Down Expand Up @@ -175,10 +176,12 @@ printMemOperand(const MCInst *MI, int opNum, raw_ostream &O) {
break;
}

O << markup("<mem:");
printOperand(MI, opNum+1, O);
O << "(";
printOperand(MI, opNum, O);
O << ")";
O << markup(">");
}

void MipsInstPrinter::
Expand Down
95 changes: 65 additions & 30 deletions llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp
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Expand Up @@ -24,32 +24,55 @@ using namespace llvm;
#include "SystemZGenAsmWriter.inc"

void SystemZInstPrinter::printAddress(unsigned Base, int64_t Disp,
unsigned Index, raw_ostream &O) {
unsigned Index, raw_ostream &O,
bool UseMarkup) {
if (UseMarkup)
O << "<imm:";
O << Disp;
if (UseMarkup)
O << ">";
if (Base || Index) {
O << '(';
if (Index) {
if (UseMarkup)
O << "<reg:";
O << '%' << getRegisterName(Index);
if (UseMarkup)
O << ">";
if (Base)
O << ',';
}
if (Base)
if (Base) {
if (UseMarkup)
O << "<reg:";
O << '%' << getRegisterName(Base);
if (UseMarkup)
O << ">";
}
O << ')';
}
}

void SystemZInstPrinter::printOperand(const MCOperand &MO, const MCAsmInfo *MAI,
raw_ostream &O) {
raw_ostream &O, bool UseMarkup) {
if (MO.isReg()) {
if (!MO.getReg())
O << '0';
else
else {
if (UseMarkup)
O << "<reg:";
O << '%' << getRegisterName(MO.getReg());
if (UseMarkup)
O << ">";
}
}
else if (MO.isImm())
else if (MO.isImm()) {
if (UseMarkup)
O << "<reg:";
O << MO.getImm();
else if (MO.isExpr())
if (UseMarkup)
O << ">";
} else if (MO.isExpr())
MO.getExpr()->print(O, MAI);
else
llvm_unreachable("Invalid operand");
Expand All @@ -63,94 +86,105 @@ void SystemZInstPrinter::printInst(const MCInst *MI, uint64_t Address,
}

void SystemZInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
O << '%' << getRegisterName(RegNo);
O << markup("<reg:") << '%' << getRegisterName(RegNo) << markup(">");
}

template <unsigned N>
static void printUImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) {
static void printUImmOperand(const MCInst *MI, int OpNum, raw_ostream &O,
bool UseMarkup) {
int64_t Value = MI->getOperand(OpNum).getImm();
assert(isUInt<N>(Value) && "Invalid uimm argument");
if (UseMarkup)
O << "<imm:";
O << Value;
if (UseMarkup)
O << ">";
}

template <unsigned N>
static void printSImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) {
static void printSImmOperand(const MCInst *MI, int OpNum, raw_ostream &O,
bool UseMarkup) {
int64_t Value = MI->getOperand(OpNum).getImm();
assert(isInt<N>(Value) && "Invalid simm argument");
if (UseMarkup)
O << "<imm:";
O << Value;
if (UseMarkup)
O << ">";
}

void SystemZInstPrinter::printU1ImmOperand(const MCInst *MI, int OpNum,
raw_ostream &O) {
printUImmOperand<1>(MI, OpNum, O);
printUImmOperand<1>(MI, OpNum, O, UseMarkup);
}

void SystemZInstPrinter::printU2ImmOperand(const MCInst *MI, int OpNum,
raw_ostream &O) {
printUImmOperand<2>(MI, OpNum, O);
printUImmOperand<2>(MI, OpNum, O, UseMarkup);
}

void SystemZInstPrinter::printU3ImmOperand(const MCInst *MI, int OpNum,
raw_ostream &O) {
printUImmOperand<3>(MI, OpNum, O);
printUImmOperand<3>(MI, OpNum, O, UseMarkup);
}

void SystemZInstPrinter::printU4ImmOperand(const MCInst *MI, int OpNum,
raw_ostream &O) {
printUImmOperand<4>(MI, OpNum, O);
printUImmOperand<4>(MI, OpNum, O, UseMarkup);
}

void SystemZInstPrinter::printU6ImmOperand(const MCInst *MI, int OpNum,
raw_ostream &O) {
printUImmOperand<6>(MI, OpNum, O);
printUImmOperand<6>(MI, OpNum, O, UseMarkup);
}

void SystemZInstPrinter::printS8ImmOperand(const MCInst *MI, int OpNum,
raw_ostream &O) {
printSImmOperand<8>(MI, OpNum, O);
printSImmOperand<8>(MI, OpNum, O, UseMarkup);
}

void SystemZInstPrinter::printU8ImmOperand(const MCInst *MI, int OpNum,
raw_ostream &O) {
printUImmOperand<8>(MI, OpNum, O);
printUImmOperand<8>(MI, OpNum, O, UseMarkup);
}

void SystemZInstPrinter::printU12ImmOperand(const MCInst *MI, int OpNum,
raw_ostream &O) {
printUImmOperand<12>(MI, OpNum, O);
printUImmOperand<12>(MI, OpNum, O, UseMarkup);
}

void SystemZInstPrinter::printS16ImmOperand(const MCInst *MI, int OpNum,
raw_ostream &O) {
printSImmOperand<16>(MI, OpNum, O);
printSImmOperand<16>(MI, OpNum, O, UseMarkup);
}

void SystemZInstPrinter::printU16ImmOperand(const MCInst *MI, int OpNum,
raw_ostream &O) {
printUImmOperand<16>(MI, OpNum, O);
printUImmOperand<16>(MI, OpNum, O, UseMarkup);
}

void SystemZInstPrinter::printS32ImmOperand(const MCInst *MI, int OpNum,
raw_ostream &O) {
printSImmOperand<32>(MI, OpNum, O);
printSImmOperand<32>(MI, OpNum, O, UseMarkup);
}

void SystemZInstPrinter::printU32ImmOperand(const MCInst *MI, int OpNum,
raw_ostream &O) {
printUImmOperand<32>(MI, OpNum, O);
printUImmOperand<32>(MI, OpNum, O, UseMarkup);
}

void SystemZInstPrinter::printU48ImmOperand(const MCInst *MI, int OpNum,
raw_ostream &O) {
printUImmOperand<48>(MI, OpNum, O);
printUImmOperand<48>(MI, OpNum, O, UseMarkup);
}

void SystemZInstPrinter::printPCRelOperand(const MCInst *MI, int OpNum,
raw_ostream &O) {
const MCOperand &MO = MI->getOperand(OpNum);
if (MO.isImm()) {
O << "0x";
O << markup("<imm:") << "0x";
O.write_hex(MO.getImm());
O << markup(">");
} else
MO.getExpr()->print(O, &MAI);
}
Expand Down Expand Up @@ -180,20 +214,20 @@ void SystemZInstPrinter::printPCRelTLSOperand(const MCInst *MI, int OpNum,

void SystemZInstPrinter::printOperand(const MCInst *MI, int OpNum,
raw_ostream &O) {
printOperand(MI->getOperand(OpNum), &MAI, O);
printOperand(MI->getOperand(OpNum), &MAI, O, UseMarkup);
}

void SystemZInstPrinter::printBDAddrOperand(const MCInst *MI, int OpNum,
raw_ostream &O) {
printAddress(MI->getOperand(OpNum).getReg(),
MI->getOperand(OpNum + 1).getImm(), 0, O);
MI->getOperand(OpNum + 1).getImm(), 0, O, UseMarkup);
}

void SystemZInstPrinter::printBDXAddrOperand(const MCInst *MI, int OpNum,
raw_ostream &O) {
printAddress(MI->getOperand(OpNum).getReg(),
MI->getOperand(OpNum + 1).getImm(),
MI->getOperand(OpNum + 2).getReg(), O);
MI->getOperand(OpNum + 2).getReg(), O, UseMarkup);
}

void SystemZInstPrinter::printBDLAddrOperand(const MCInst *MI, int OpNum,
Expand All @@ -203,7 +237,7 @@ void SystemZInstPrinter::printBDLAddrOperand(const MCInst *MI, int OpNum,
uint64_t Length = MI->getOperand(OpNum + 2).getImm();
O << Disp << '(' << Length;
if (Base)
O << ",%" << getRegisterName(Base);
O << "," << markup("<reg:") << "%" << getRegisterName(Base) << markup(">");
O << ')';
}

Expand All @@ -212,17 +246,18 @@ void SystemZInstPrinter::printBDRAddrOperand(const MCInst *MI, int OpNum,
unsigned Base = MI->getOperand(OpNum).getReg();
uint64_t Disp = MI->getOperand(OpNum + 1).getImm();
unsigned Length = MI->getOperand(OpNum + 2).getReg();
O << Disp << "(%" << getRegisterName(Length);
O << Disp << "(" << markup("<reg:") << "%" << getRegisterName(Length)
<< markup(">");
if (Base)
O << ",%" << getRegisterName(Base);
O << "," << markup("<reg:") << "%" << getRegisterName(Base) << markup(">");
O << ')';
}

void SystemZInstPrinter::printBDVAddrOperand(const MCInst *MI, int OpNum,
raw_ostream &O) {
printAddress(MI->getOperand(OpNum).getReg(),
MI->getOperand(OpNum + 1).getImm(),
MI->getOperand(OpNum + 2).getReg(), O);
MI->getOperand(OpNum + 2).getReg(), O, UseMarkup);
}

void SystemZInstPrinter::printCond4Operand(const MCInst *MI, int OpNum,
Expand Down
4 changes: 2 additions & 2 deletions llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.h
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Expand Up @@ -32,11 +32,11 @@ class SystemZInstPrinter : public MCInstPrinter {

// Print an address with the given base, displacement and index.
static void printAddress(unsigned Base, int64_t Disp, unsigned Index,
raw_ostream &O);
raw_ostream &O, bool UseMarkup);

// Print the given operand.
static void printOperand(const MCOperand &MO, const MCAsmInfo *MAI,
raw_ostream &O);
raw_ostream &O, bool UseMarkup);

// Override MCInstPrinter.
void printRegName(raw_ostream &O, unsigned RegNo) const override;
Expand Down
5 changes: 3 additions & 2 deletions llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
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Expand Up @@ -705,7 +705,7 @@ bool SystemZAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, OS);
SystemZMCInstLower Lower(MF->getContext(), *this);
MCOperand MO(Lower.lowerOperand(MI->getOperand(OpNo)));
SystemZInstPrinter::printOperand(MO, MAI, OS);
SystemZInstPrinter::printOperand(MO, MAI, OS, false);
return false;
}

Expand All @@ -715,7 +715,8 @@ bool SystemZAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
raw_ostream &OS) {
SystemZInstPrinter::printAddress(MI->getOperand(OpNo).getReg(),
MI->getOperand(OpNo + 1).getImm(),
MI->getOperand(OpNo + 2).getReg(), OS);
MI->getOperand(OpNo + 2).getReg(), OS,
false);
return false;
}

Expand Down
4 changes: 2 additions & 2 deletions llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
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Expand Up @@ -295,15 +295,15 @@ void X86InstPrinterCommon::printPCRelImm(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
const MCOperand &Op = MI->getOperand(OpNo);
if (Op.isImm())
O << formatImm(Op.getImm());
O << markup("<imm:") << formatImm(Op.getImm()) << markup(">");
else {
assert(Op.isExpr() && "unknown pcrel immediate operand");
// If a symbolic branch target was added as a constant expression then print
// that address in hex.
const MCConstantExpr *BranchTarget = dyn_cast<MCConstantExpr>(Op.getExpr());
int64_t Address;
if (BranchTarget && BranchTarget->evaluateAsAbsolute(Address)) {
O << formatHex((uint64_t)Address);
O << markup("<imm:") << formatHex((uint64_t)Address) << markup(">");
} else {
// Otherwise, just print the expression.
Op.getExpr()->print(O, &MAI);
Expand Down
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