[LLVM] Instructions using register pairs in the xxldsp extension under rv32 behave abnormally

[muxiff]

For the following example:

static inline  long long __RV_MULSR64(long long  a, long long b)
{
    long long result;
    asm volatile("mulsr64 %0, %1, %2" : "=r"(result) : "r"(a), "r"(b));
    return result;
}

long long  foo(void) {
    long a =10,  b = 10;
    long long c1,c2,c3;
    c1 = __RV_MULSR64(a, b);
    c2 = __RV_MULSR64(b, a);
    c3 = c1 + c2;
    return c3;
}

The result obtained through compilation and disassembly in the following way:

$ riscv64-unknown-elf-clang -march=rv32imafdc_xxldspn3x -mabi=ilp32 -c xxldsp_reg_pair.c -O2
$ riscv64-unknown-elf-objdump -d xxldsp_reg_pair.o

xxldsp_reg_pair.o:     file format elf32-littleriscv


Disassembly of section .text:

00000000 <foo>:
   0:   4501                    li      a0,0
   2:   45a9                    li      a1,10
   4:   e0b5967f                mulsr64 a2,a1,a1
   8:   e0b595ff                mulsr64 a1,a1,a1
   c:   96aa                    add     a3,a3,a0
   e:   00c58533                add     a0,a1,a2
  12:   00b535b3                sltu    a1,a0,a1
  16:   95b6                    add     a1,a1,a3
  18:   8082                    ret

It can be seen that the rd in the second mulsr64 does not use register pairs.