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Explicit pseudo op inclusion #126

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merged 4 commits into from
Jun 9, 2022

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neelgala
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@neelgala neelgala commented Jun 9, 2022

This should fix the issues highlighted in riscv-software-src/riscv-isa-sim#1020 and #125

This is to ensure that pseudo instructions like slli are added from rv64i instead of rv32i
…ion dict

specifically done to handle encoding.out.h that is being used by spike
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Makes sense. Thanks for following up on this, @neelgala.

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