SIMD groundwork part 1 #27169

huonw · Jul 20, 2015

This implements rust-lang/rfcs#1199 (except for doing all the platform intrinsics).

Things remaining for SIMD (not necessarily in this PR):

I (@huonw) am signed up to ensure the compiler matches the RFC, when it lands
the platform specific intrinsics aren't properly type checked at the moment (LLVM will throw a "random" assertion)
there's a lot of useful intrinsics that are missing, including whole platforms (mips, powerpc)
the target-feature cfg detection/adding is not so great at the moment
I think the platform specific intrinsics should go in their own extern ABI (i.e. not "rust-intrinsic")

(I'm adjusting the RFC to reflect the latter.)

I think it would be very nice for this to land without requiring the RFC to land first, because of the first point, and because this is the only way for any further work to happen/be experimented with, without requiring people to build/install/multirust a compiler from a custom branch.

r? @alexcrichton

eefriedman · Jul 20, 2015

eefriedman reviewed Jul 20, 2015

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eefriedman · Jul 20, 2015

src/librustc_trans/trans/type_of.rs

-              let llet = in_memory_type_of(cx, t.simd_type(cx.tcx()));
+              let elem_ty = match t.simd_machine_type(cx.tcx()) {
+                  Some(e) => e,
+                  None => cx.sess().fatal("monomorphising SIMD type to an incompatible element")


This is ugly... is allowing generic SIMD types actually important in practice? It seems like you could accomplish most of what is necessary with traits and maybe a few macros.

I agree it isn't so great, but note that in practice type safety is ensured via traits, e.g. struct Simd4<T: SimdElem>(T, T, T, T);.

This is the major difference to our current #[simd] scheme. Being generic is extremely useful, or else there is some extreme code-duplication and the compiler/library can't "synthesize" random types for helpers easily (i.e. forcing that duplication), e.g. fn get_high<T: SimdElem>(Simd4<T>) -> Simd2<T> works with any T but would require manually writing out for every Tx4 concrete type. (It'd be good to keep this sort of "high level" discussion on rust-lang/rfcs#1199 .)

Still not sure this is a great... but okay, I'll move the discussion.

alexcrichton · Jul 21, 2015

alexcrichton reviewed Jul 21, 2015

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alexcrichton · Jul 21, 2015

src/librustc_driver/target_features.rs

+
+fn features_contain(sess: &Session, s: &str) -> bool {
+    sess.target.target.options.features.contains(s) ||
+        sess.opts.cg.target_feature.contains(s)


Isn't querying LLVM the "most robust" thing to do here? I guess all of these are disabled by default, though?

They're all disabled by default, yeah; and querying LLVM doesn't seem overly possible, unfortunately. You have a better idea about LLVM's structure so maybe you can wrangle something, though.

I believe you can get ahold of a TargetMachineRef, get ahold of the MCSubtargetInfo, get the list of features, and then test for various features being available.

It's probably not super critical that this happens immediately though.

Could you add a comment to this function with the results of this investigation? Basically something along the lines of "we'd love to do X but we couldn't do it because of Y, hence we're doing the 'poor mans' version Z"

alexcrichton · Jul 21, 2015

alexcrichton reviewed Jul 21, 2015

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alexcrichton · Jul 21, 2015

src/librustc_platform_intrinsics/lib.rs

+    Float(u8),
+    Pointer(Box<Type>),
+    Vector(Box<Type>, u8),
+}


If this enum is just translated straight to a Ty below, perhaps this could just be a Ty in-memory and there could be an initialization pass for loading intrinsics into the tcx?

What do you mean by "loading intrinsics into the tcx"?

Just in the sense of instead of building up the custom Type here for signatures of all the functions and then pushing them into the tcx (with a translation layer), instead just push all the types into the tcx directly.

alexcrichton · Jul 21, 2015

alexcrichton reviewed Jul 21, 2015

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alexcrichton · Jul 21, 2015

src/librustc_platform_intrinsics/aarch64.rs

+        "vminq_f32" => p!("fmin.v4f32", (f32x4, f32x4) -> f32x4),
+        "vminq_f64" => p!("fmin.v2f64", (f64x2, f64x2) -> f64x2),
+        _ => return None,
+    })


These blocks seem pretty similar to the pre-existing "intrinsic declaration" location. Perhaps these paths could be unified?

Also, do you know if all of these intrinsics are available on all of llvm 3.5+? I guess in general do you know if LLVM is adding new intrinsics basically every day, or are they kinda frozen now?

My (weak) intention is to somehow have this autogenerated, and there will be a lot (thousands), so having it separated seems better.

Hm ok, this probably isn't too too bad in that case.

alexcrichton · Jul 21, 2015

alexcrichton reviewed Jul 21, 2015

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alexcrichton · Jul 21, 2015

src/librustc_trans/trans/intrinsic.rs

+                Cmp::Ge => llvm::RealOGE,
+            };
+            SExt(bcx, FCmp(bcx, op, llargs[0], llargs[1], call_debug_location), llret_ty)
+        };


Could this leverage compare_scalar_types instead?

Theoretically, but compare_simd_types is probably the more appropriate variant.

Aha! That would also make sense!

alexcrichton · Jul 21, 2015

alexcrichton reviewed Jul 21, 2015

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alexcrichton · Jul 21, 2015

src/librustc_typeck/check/mod.rs

+            name if name.starts_with("x86_") ||
+                    name.starts_with("arm_") ||
+                    name.starts_with("aarch64_") => {
+                // FIXME: skip checking these for now


Would this be easier to wire up if the Ty representation was used already for the intrinsic definitions?

alexcrichton · Jul 21, 2015

Nice work @huonw!

I think the platform specific intrinsics should go in their own extern ABI (i.e. not "rust-intrinsic")

I agree, not having the namespace of "simd_" made me a tad uneasy.

I think it would be very nice for this to land without requiring the RFC to land first, because of the first point, and because this is the only way for any further work to happen/be experimented with, without requiring people to build/install/multirust a compiler from a custom branch.

I would personally be ok with this, but I'm curious to hear what others think as well? Also, do you think the RFC basically has "broad consensus" modulo minor details by this point? If there are still some somewhat contentious decisions here and there it may be worth waiting a little longer before landing this, but if we're all in agreement pretty much then any future minor updates can be easily reflected here (as everything is unstable anyway).

cc @rust-lang/lang

bors · Jul 22, 2015

☔️ The latest upstream changes (presumably #27176) made this pull request unmergeable. Please resolve the merge conflicts.

bors · Jul 31, 2015

☔️ The latest upstream changes (presumably #27382) made this pull request unmergeable. Please resolve the merge conflicts.

huonw · Aug 6, 2015

Ok, rebased and updated to be better, including

intrinsics for casts and arithmetic (i.e. operators don't work automatically for SIMD types: they have to go via the normal traits)
a special platform-intrinsic extern ABI for these intrinsics,
type-checking the platform-specific intrinsics,
some general refactorings

(I'm updating the RFC to ensure it matches the things I've learned while implementing, as we speak.)

bors · Aug 7, 2015

☔️ The latest upstream changes (presumably #27551) made this pull request unmergeable. Please resolve the merge conflicts.

alexcrichton · Aug 11, 2015

alexcrichton reviewed Aug 11, 2015

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alexcrichton · Aug 11, 2015

src/librustc_trans/trans/intrinsic.rs

@@ -897,7 +906,41 @@ pub fn trans_intrinsic_call<'a, 'blk, 'tcx>(mut bcx: Block<'blk, 'tcx>,

        }

-        (_, _) => ccx.sess().span_bug(foreign_item.span, "unknown intrinsic")
+        (_, _) => {
+            match Intrinsic::find(tcx, &name) {


Could this de-indent a level via:

let intr = match ... { None => ccx.sess().span_bug(...), Some(intr) => intr, };

alexcrichton · Aug 11, 2015

Looking good to me! Just a minor nit so far

huonw · Aug 13, 2015

Updated (will rebase in a bit), includes addressing the nit, adding a pile of platform intrinsic definitions (gets much of x86-64 from SSE to AVX2 and ARM NEON), and adding tests.

huonw · Aug 13, 2015

(There's still some more tests I want to add, particularly run-pass tests making sure the various generic intrinsics behave sanely.)

cesarb · Aug 13, 2015

cesarb reviewed Aug 13, 2015

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cesarb · Aug 13, 2015

src/librustc_trans/trans/type_of.rs

@@ -223,7 +224,14 @@ pub fn sizing_type_of<'a, 'tcx>(cx: &CrateContext<'a, 'tcx>, t: Ty<'tcx>) -> Typ

        ty::TyStruct(..) => {
            if t.is_simd(cx.tcx()) {
-                let llet = type_of(cx, t.simd_type(cx.tcx()));
+                let e = t.simd_type(cx.tcx());
+                println!("sizing_type_of: simd: {}", e);


This seems to be a stray debugging println!, which is hit while compiling libcore.

cesarb · Aug 13, 2015

cesarb reviewed Aug 13, 2015

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cesarb · Aug 13, 2015

src/librustc_trans/trans/type_of.rs

@@ -405,7 +417,14 @@ pub fn in_memory_type_of<'a, 'tcx>(cx: &CrateContext<'a, 'tcx>, t: Ty<'tcx>) ->
      }
      ty::TyStruct(did, ref substs) => {
          if t.is_simd(cx.tcx()) {
-              let llet = in_memory_type_of(cx, t.simd_type(cx.tcx()));
+              let e = t.simd_type(cx.tcx());
+              println!("in_memory_type_of: simd: {}", e);


This seems to be a stray debugging println!, which is hit while compiling libcore.

huonw · Aug 17, 2015

@bors r=alexcrichton

bors · Aug 17, 2015

📌 Commit 02e9734 has been approved by alexcrichton

bors · Aug 17, 2015

⌛️ Testing commit 02e9734 with merge e35fd74...

bors · Aug 18, 2015

☀️ Test successful - auto-linux-32-nopt-t, auto-linux-32-opt, auto-linux-64-nopt-t, auto-linux-64-opt, auto-linux-64-x-android-t, auto-mac-32-opt, auto-mac-64-nopt-t, auto-mac-64-opt, auto-win-gnu-32-nopt-t, auto-win-gnu-32-opt, auto-win-gnu-64-nopt-t, auto-win-gnu-64-opt, auto-win-msvc-32-opt, auto-win-msvc-64-opt

rust-highfive assigned alexcrichton Jul 20, 2015

huonw force-pushed the huonw:simd branch 2 times, most recently from 68fb467 to 88cdfbd Jul 20, 2015

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Port code to "SIMD groundwork part 1"
Port the SIMD code to rust-lang/rust#27169

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9e5a416

cesarb referenced this pull request Aug 7, 2015
Merged
SIMD groundwork #1199

cesarb added a commit to cesarb/blake2-rfc that referenced this pull request Aug 8, 2015

Finish porting code to "SIMD groundwork part 1"
Finish porting the SIMD code to rust-lang/rust#27169

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05b5e01

alexcrichton referenced this pull request Aug 12, 2015
Open
Tracking issue for SIMD support #27731

huonw force-pushed the huonw:simd branch from 16c5c37 to b05b2a4 Aug 13, 2015

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huonw referenced this pull request Aug 18, 2015
Closed
ABIs are validated before cfg-ing #27873

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Closed
Improve handling of immediate values #27600

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Merged
Change simd to repr simd & bump version number #101

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Initial SIMD glyph advance_for_char_range

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