Assert when TLS is not implemented.

llvm-svn: 39737

Author: laurovenancio

llvm/lib/Target/Alpha/AlphaISelLowering.cpp

@@ -122,6 +122,7 @@ AlphaTargetLowering::AlphaTargetLowering(TargetMachine &TM) : TargetLowering(TM)
   setOperationAction(ISD::GlobalAddress,  MVT::i64, Custom);
   setOperationAction(ISD::ConstantPool,   MVT::i64, Custom);
   setOperationAction(ISD::ExternalSymbol, MVT::i64, Custom);
+  setOperationAction(ISD::GlobalTLSAddress, MVT::i64, Custom);
 
   setOperationAction(ISD::VASTART, MVT::Other, Custom);
   setOperationAction(ISD::VAEND,   MVT::Other, Expand);
@@ -424,6 +425,8 @@ SDOperand AlphaTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
     SDOperand Lo = DAG.getNode(AlphaISD::GPRelLo, MVT::i64, CPI, Hi);
     return Lo;
   }
+  case ISD::GlobalTLSAddress:
+    assert(0 && "TLS not implemented for Alpha.");
   case ISD::GlobalAddress: {
     GlobalAddressSDNode *GSDN = cast<GlobalAddressSDNode>(Op);
     GlobalValue *GV = GSDN->getGlobal();

llvm/lib/Target/IA64/IA64ISelLowering.cpp

@@ -108,6 +108,9 @@ IA64TargetLowering::IA64TargetLowering(TargetMachine &TM)
       setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
       setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64, Expand);
 
+      // Thread Local Storage
+      setOperationAction(ISD::GlobalTLSAddress, MVT::i64, Custom);
+
       setStackPointerRegisterToSaveRestore(IA64::r12);
 
       setJumpBufSize(704); // on ia64-linux, jmp_bufs are 704 bytes..
@@ -538,6 +541,8 @@ SDOperand IA64TargetLowering::
 LowerOperation(SDOperand Op, SelectionDAG &DAG) {
   switch (Op.getOpcode()) {
   default: assert(0 && "Should not custom lower this!");
+  case ISD::GlobalTLSAddress:
+    assert(0 && "TLS not implemented for IA64.");
   case ISD::RET: {
     SDOperand AR_PFSVal, Copy;
 

llvm/lib/Target/Mips/MipsISelLowering.cpp

@@ -59,6 +59,7 @@ MipsTargetLowering(MipsTargetMachine &TM): TargetLowering(TM)
 
   // Custom
   setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
+  setOperationAction(ISD::GlobalTLSAddress, MVT::i32, Custom);
   setOperationAction(ISD::RET, MVT::Other, Custom);
 
   // Load extented operations for i1 types must be promoted 
@@ -115,6 +116,7 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG)
     case ISD::FORMAL_ARGUMENTS: return LowerFORMAL_ARGUMENTS(Op, DAG);
     case ISD::RET:              return LowerRET(Op, DAG);
     case ISD::GlobalAddress:    return LowerGlobalAddress(Op, DAG);
+    case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG);
     case ISD::RETURNADDR:       return LowerRETURNADDR(Op, DAG);
   }
   return SDOperand();
@@ -162,6 +164,12 @@ LowerGlobalAddress(SDOperand Op, SelectionDAG &DAG)
   return DAG.getNode(ISD::ADD, MVT::i32, Lo, Hi);
 }
 
+SDOperand MipsTargetLowering::
+LowerGlobalTLSAddress(SDOperand Op, SelectionDAG &DAG)
+{
+  assert(0 && "TLS not implemented for MIPS.");
+}
+
 SDOperand MipsTargetLowering::
 LowerRETURNADDR(SDOperand Op, SelectionDAG &DAG) {
   // Depths > 0 not supported yet!

llvm/lib/Target/Mips/MipsISelLowering.h

@@ -75,6 +75,7 @@ namespace llvm {
     SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG);
     SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG);
     SDOperand LowerGlobalAddress(SDOperand Op, SelectionDAG &DAG);
+    SDOperand LowerGlobalTLSAddress(SDOperand Op, SelectionDAG &DAG);
     SDOperand LowerRETURNADDR(SDOperand Op, SelectionDAG &DAG);
 
   };

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

@@ -159,9 +159,11 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM)
   // We want to legalize GlobalAddress and ConstantPool nodes into the 
   // appropriate instructions to materialize the address.
   setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
+  setOperationAction(ISD::GlobalTLSAddress, MVT::i32, Custom);
   setOperationAction(ISD::ConstantPool,  MVT::i32, Custom);
   setOperationAction(ISD::JumpTable,     MVT::i32, Custom);
   setOperationAction(ISD::GlobalAddress, MVT::i64, Custom);
+  setOperationAction(ISD::GlobalTLSAddress, MVT::i64, Custom);
   setOperationAction(ISD::ConstantPool,  MVT::i64, Custom);
   setOperationAction(ISD::JumpTable,     MVT::i64, Custom);
 
@@ -1014,6 +1016,10 @@ static SDOperand LowerJumpTable(SDOperand Op, SelectionDAG &DAG) {
   return Lo;
 }
 
+static SDOperand LowerGlobalTLSAddress(SDOperand Op, SelectionDAG &DAG) {
+  assert(0 && "TLS not implemented for PPC.");
+}
+
 static SDOperand LowerGlobalAddress(SDOperand Op, SelectionDAG &DAG) {
   MVT::ValueType PtrVT = Op.getValueType();
   GlobalAddressSDNode *GSDN = cast<GlobalAddressSDNode>(Op);
@@ -2862,6 +2868,7 @@ SDOperand PPCTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
   default: assert(0 && "Wasn't expecting to be able to lower this!"); 
   case ISD::ConstantPool:       return LowerConstantPool(Op, DAG);
   case ISD::GlobalAddress:      return LowerGlobalAddress(Op, DAG);
+  case ISD::GlobalTLSAddress:   return LowerGlobalTLSAddress(Op, DAG);
   case ISD::JumpTable:          return LowerJumpTable(Op, DAG);
   case ISD::SETCC:              return LowerSETCC(Op, DAG);
   case ISD::VASTART:            

llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp

@@ -141,6 +141,7 @@ SparcTargetLowering::SparcTargetLowering(TargetMachine &TM)
 
   // Custom legalize GlobalAddress nodes into LO/HI parts.
   setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
+  setOperationAction(ISD::GlobalTLSAddress, MVT::i32, Custom);
   setOperationAction(ISD::ConstantPool , MVT::i32, Custom);
 
   // Sparc doesn't have sext_inreg, replace them with shl/sra
@@ -700,6 +701,8 @@ SDOperand SparcTargetLowering::
 LowerOperation(SDOperand Op, SelectionDAG &DAG) {
   switch (Op.getOpcode()) {
   default: assert(0 && "Should not custom lower this!");
+  case ISD::GlobalTLSAddress:
+    assert(0 && "TLS not implemented for Sparc.");
   case ISD::GlobalAddress: {
     GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
     SDOperand GA = DAG.getTargetGlobalAddress(GV, MVT::i32);