HLS-based Graph Processing Framework on FPGAs
-
Updated
Oct 11, 2022 - C++
HLS-based Graph Processing Framework on FPGAs
SYCL for Vitis: Experimental fusion of triSYCL with Intel SYCL oneAPI DPC++ up-streaming effort into Clang/LLVM
Intel® Data Mover Library (Intel® DML)
The framework for the paper "Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators" in ISCA 2023.
Automatic virtualization of (general) accelerators.
GARDENIA: Graph Analytics Repository for Designing Efficient Next-generation Accelerators
Wrapper to accelerate linters like clang-tidy via ccache
A static performance-estimation tool for specialized hardware accelerators.
Compile time kernels fusion and expression trees as Alpaka boost.odeint backend
Add a description, image, and links to the accelerators topic page so that developers can more easily learn about it.
To associate your repository with the accelerators topic, visit your repo's landing page and select "manage topics."