IP Module For LTC2311 ADC
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Updated
Jan 23, 2024 - SystemVerilog
IP Module For LTC2311 ADC
A slot machine created in System Verilog. It was built, simulated, synthesized, and implemented in Vivado, for use on the Xilinx Basys 3 board.
Repository containing the code for implementing the classic game Pong on a Nexys A7 Digilent FPGA development board.
This repository contains different modules which execute arithmetic operations.
FIFO buffer library. Written and verified in SystemVerilog. Can be synthetised in ASIC or FPGA.
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